ESP IDF Robot

This commit is contained in:
2024-12-21 23:06:39 -05:00
parent 363fa2e64c
commit 945b57e107
28 changed files with 686 additions and 1856 deletions

Binary file not shown.

View File

@@ -0,0 +1,34 @@
# ninja log v6
113 10707 1734840393447264700 build.ninja 1810ecd0a7b8a7ce
117 193 1734840393783233815 project_elf_src_esp32.c fcb1cf68b8841c4d
117 193 1734840393783233815 /home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build/project_elf_src_esp32.c fcb1cf68b8841c4d
106 252 1734840393834229127 esp-idf/esp_system/ld/memory.ld c57fef4eb41670de
106 252 1734840393834229127 /home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build/esp-idf/esp_system/ld/memory.ld c57fef4eb41670de
109 255 1734840393835229035 esp-idf/esp_system/ld/sections.ld.in 5f0912df48bca18c
109 255 1734840393835229035 /home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build/esp-idf/esp_system/ld/sections.ld.in 5f0912df48bca18c
112 1208 1734840394072207245 partition_table/partition-table.bin 59dd723bdaa1d79b
112 1208 1734840394072207245 /home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build/partition_table/partition-table.bin 59dd723bdaa1d79b
273 1711 1734840393872225634 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/httpd_parse.c.obj 2a0a5b947b42a7ea
278 1757 1734840393877225175 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/httpd_sess.c.obj 5db5d51c7c249a7a
257 1887 1734840393856227105 esp-idf/esp_https_ota/CMakeFiles/__idf_esp_https_ota.dir/src/esp_https_ota.c.obj 594e55c427f4ab4a
1719 2108 1734840395320092412 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/httpd_ws.c.obj 6261a53ca5b8b719
1887 2113 1734840395486077129 esp-idf/esp_https_ota/libesp_https_ota.a 9b1c137c5c64c754
268 2137 1734840393868226002 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/httpd_main.c.obj 5416a6bcd666ad79
286 2206 1734840393885224439 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/httpd_txrx.c.obj 543775576952fd85
1758 2233 1734840395357089006 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/util/ctrl_sock.c.obj 532b818f4ea29679
1208 2308 1734840394808139537 esp-idf/esp_http_server/CMakeFiles/__idf_esp_http_server.dir/src/httpd_uri.c.obj 5ecb90d919facd2c
2206 2560 1734840395806047667 esp-idf/esp_http_client/CMakeFiles/__idf_esp_http_client.dir/lib/http_utils.c.obj 1d7ee4209122e4c9
2309 2572 1734840395908038276 esp-idf/esp_http_server/libesp_http_server.a 1f12e394136d9223
2113 2619 1734840395712056322 esp-idf/esp_http_client/CMakeFiles/__idf_esp_http_client.dir/lib/http_auth.c.obj 7df97156714813a8
2137 2712 1734840395736054112 esp-idf/esp_http_client/CMakeFiles/__idf_esp_http_client.dir/lib/http_header.c.obj 206ea1bda3c1689a
2234 3840 1734840395835044997 esp-idf/tcp_transport/CMakeFiles/__idf_tcp_transport.dir/transport.c.obj 8f04831a4b6a42d5
2560 3922 1734840396159015155 esp-idf/tcp_transport/CMakeFiles/__idf_tcp_transport.dir/transport_ssl.c.obj ab0070e3467a6805
2712 3983 1734840396311001150 esp-idf/tcp_transport/CMakeFiles/__idf_tcp_transport.dir/transport_ws.c.obj a3fe60db5efbbbd5
2577 4076 1734840396176013589 esp-idf/tcp_transport/CMakeFiles/__idf_tcp_transport.dir/transport_internal.c.obj 42ce376561d17e0c
3923 4300 1734840397521889528 esp-idf/esp_gdbstub/CMakeFiles/__idf_esp_gdbstub.dir/src/gdbstub_transport.c.obj 9ba085a1826c7f94
2620 4349 1734840396219009627 esp-idf/tcp_transport/CMakeFiles/__idf_tcp_transport.dir/transport_socks_proxy.c.obj 9174d1879d42d52b
4300 4575 1734840397898854764 esp-idf/esp_gdbstub/CMakeFiles/__idf_esp_gdbstub.dir/src/port/xtensa/gdbstub-entry.S.obj 7dd4b6ecb8ffaba7
4349 4600 1734840397947850245 esp-idf/esp_gdbstub/CMakeFiles/__idf_esp_gdbstub.dir/src/port/xtensa/xt_debugexception.S.obj 89c9bd58945f654c
3983 4749 1734840397581883996 esp-idf/esp_gdbstub/CMakeFiles/__idf_esp_gdbstub.dir/src/packet.c.obj 6b06c0063512afb6
3843 4902 1734840397441896906 esp-idf/esp_gdbstub/CMakeFiles/__idf_esp_gdbstub.dir/src/gdbstub.c.obj 6a281fb11d1ef8d6
4077 4974 1734840397675875327 esp-idf/esp_gdbstub/CMakeFiles/__idf_esp_gdbstub.dir/src/port/xtensa/gdbstub_xtensa.c.obj c9f1cceea3f3526f

View File

@@ -1 +1 @@
8f1974bd5613f9dd779c03331f128d9c9769ddef 363fa2e64c203d10dcb67896656f78d8a2b85906

File diff suppressed because one or more lines are too long

View File

@@ -1279,7 +1279,7 @@
}, },
{ {
"directory": "/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build", "directory": "/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build",
"command": "/home/abobkov/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/xtensa-esp32-elf-gcc -DESP_PLATFORM -DIDF_VER=\\\"v5.2.3\\\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DSOC_XTAL_FREQ_MHZ=CONFIG_XTAL_FREQ -D_GLIBCXX_HAVE_POSIX_SEMAPHORE -D_GLIBCXX_USE_POSIX_SEMAPHORE -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -D PROJECT_NAME=\\\"ESP-IDF_Robot\\\" -DPROJECT_VER=\\\"ESP32-Node_Switch-v2.7-112-g8f1\\\" -I/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build/config -I/home/abobkov/esp/esp-idf/components/esp_app_format/include -I/home/abobkov/esp/esp-idf/components/newlib/platform_include -I/home/abobkov/esp/esp-idf/components/freertos/config/include -I/home/abobkov/esp/esp-idf/components/freertos/config/include/freertos -I/home/abobkov/esp/esp-idf/components/freertos/config/xtensa/include -I/home/abobkov/esp/esp-idf/components/freertos/FreeRTOS-Kernel/include -I/home/abobkov/esp/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/include -I/home/abobkov/esp/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/include/freertos -I/home/abobkov/esp/esp-idf/components/freertos/esp_additions/include -I/home/abobkov/esp/esp-idf/components/esp_hw_support/include -I/home/abobkov/esp/esp-idf/components/esp_hw_support/include/soc -I/home/abobkov/esp/esp-idf/components/esp_hw_support/include/soc/esp32 -I/home/abobkov/esp/esp-idf/components/esp_hw_support/port/esp32/. -I/home/abobkov/esp/esp-idf/components/heap/include -I/home/abobkov/esp/esp-idf/components/log/include -I/home/abobkov/esp/esp-idf/components/soc/include -I/home/abobkov/esp/esp-idf/components/soc/esp32 -I/home/abobkov/esp/esp-idf/components/soc/esp32/include -I/home/abobkov/esp/esp-idf/components/hal/platform_port/include -I/home/abobkov/esp/esp-idf/components/hal/esp32/include -I/home/abobkov/esp/esp-idf/components/hal/include -I/home/abobkov/esp/esp-idf/components/esp_rom/include -I/home/abobkov/esp/esp-idf/components/esp_rom/include/esp32 -I/home/abobkov/esp/esp-idf/components/esp_rom/esp32 -I/home/abobkov/esp/esp-idf/components/esp_common/include -I/home/abobkov/esp/esp-idf/components/esp_system/include -I/home/abobkov/esp/esp-idf/components/esp_system/port/soc -I/home/abobkov/esp/esp-idf/components/esp_system/port/include/private -I/home/abobkov/esp/esp-idf/components/xtensa/esp32/include -I/home/abobkov/esp/esp-idf/components/xtensa/include -I/home/abobkov/esp/esp-idf/components/xtensa/deprecated_include -I/home/abobkov/esp/esp-idf/components/lwip/include -I/home/abobkov/esp/esp-idf/components/lwip/include/apps -I/home/abobkov/esp/esp-idf/components/lwip/include/apps/sntp -I/home/abobkov/esp/esp-idf/components/lwip/lwip/src/include -I/home/abobkov/esp/esp-idf/components/lwip/port/include -I/home/abobkov/esp/esp-idf/components/lwip/port/freertos/include -I/home/abobkov/esp/esp-idf/components/lwip/port/esp32xx/include -I/home/abobkov/esp/esp-idf/components/lwip/port/esp32xx/include/arch -I/home/abobkov/esp/esp-idf/components/lwip/port/esp32xx/include/sys -mlongcalls -Wno-frame-address -fno-builtin-memcpy -fno-builtin-memset -fno-builtin-bzero -fno-builtin-stpcpy -fno-builtin-strncpy -fdiagnostics-color=always -ffunction-sections -fdata-sections -Wall -Werror=all -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wextra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -Og -fno-shrink-wrap -fmacro-prefix-map=/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot=. -fmacro-prefix-map=/home/abobkov/esp/esp-idf=/IDF -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -std=gnu17 -Wno-old-style-declaration -o esp-idf/esp_app_format/CMakeFiles/__idf_esp_app_format.dir/esp_app_desc.c.obj -c /home/abobkov/esp/esp-idf/components/esp_app_format/esp_app_desc.c", "command": "/home/abobkov/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/xtensa-esp32-elf-gcc -DESP_PLATFORM -DIDF_VER=\\\"v5.2.3\\\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DSOC_XTAL_FREQ_MHZ=CONFIG_XTAL_FREQ -D_GLIBCXX_HAVE_POSIX_SEMAPHORE -D_GLIBCXX_USE_POSIX_SEMAPHORE -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -D PROJECT_NAME=\\\"ESP-IDF_Robot\\\" -DPROJECT_VER=\\\"ESP32-Node_Switch-v2.7-114-g363\\\" -I/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build/config -I/home/abobkov/esp/esp-idf/components/esp_app_format/include -I/home/abobkov/esp/esp-idf/components/newlib/platform_include -I/home/abobkov/esp/esp-idf/components/freertos/config/include -I/home/abobkov/esp/esp-idf/components/freertos/config/include/freertos -I/home/abobkov/esp/esp-idf/components/freertos/config/xtensa/include -I/home/abobkov/esp/esp-idf/components/freertos/FreeRTOS-Kernel/include -I/home/abobkov/esp/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/include -I/home/abobkov/esp/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/include/freertos -I/home/abobkov/esp/esp-idf/components/freertos/esp_additions/include -I/home/abobkov/esp/esp-idf/components/esp_hw_support/include -I/home/abobkov/esp/esp-idf/components/esp_hw_support/include/soc -I/home/abobkov/esp/esp-idf/components/esp_hw_support/include/soc/esp32 -I/home/abobkov/esp/esp-idf/components/esp_hw_support/port/esp32/. -I/home/abobkov/esp/esp-idf/components/heap/include -I/home/abobkov/esp/esp-idf/components/log/include -I/home/abobkov/esp/esp-idf/components/soc/include -I/home/abobkov/esp/esp-idf/components/soc/esp32 -I/home/abobkov/esp/esp-idf/components/soc/esp32/include -I/home/abobkov/esp/esp-idf/components/hal/platform_port/include -I/home/abobkov/esp/esp-idf/components/hal/esp32/include -I/home/abobkov/esp/esp-idf/components/hal/include -I/home/abobkov/esp/esp-idf/components/esp_rom/include -I/home/abobkov/esp/esp-idf/components/esp_rom/include/esp32 -I/home/abobkov/esp/esp-idf/components/esp_rom/esp32 -I/home/abobkov/esp/esp-idf/components/esp_common/include -I/home/abobkov/esp/esp-idf/components/esp_system/include -I/home/abobkov/esp/esp-idf/components/esp_system/port/soc -I/home/abobkov/esp/esp-idf/components/esp_system/port/include/private -I/home/abobkov/esp/esp-idf/components/xtensa/esp32/include -I/home/abobkov/esp/esp-idf/components/xtensa/include -I/home/abobkov/esp/esp-idf/components/xtensa/deprecated_include -I/home/abobkov/esp/esp-idf/components/lwip/include -I/home/abobkov/esp/esp-idf/components/lwip/include/apps -I/home/abobkov/esp/esp-idf/components/lwip/include/apps/sntp -I/home/abobkov/esp/esp-idf/components/lwip/lwip/src/include -I/home/abobkov/esp/esp-idf/components/lwip/port/include -I/home/abobkov/esp/esp-idf/components/lwip/port/freertos/include -I/home/abobkov/esp/esp-idf/components/lwip/port/esp32xx/include -I/home/abobkov/esp/esp-idf/components/lwip/port/esp32xx/include/arch -I/home/abobkov/esp/esp-idf/components/lwip/port/esp32xx/include/sys -mlongcalls -Wno-frame-address -fno-builtin-memcpy -fno-builtin-memset -fno-builtin-bzero -fno-builtin-stpcpy -fno-builtin-strncpy -fdiagnostics-color=always -ffunction-sections -fdata-sections -Wall -Werror=all -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wextra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -Og -fno-shrink-wrap -fmacro-prefix-map=/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot=. -fmacro-prefix-map=/home/abobkov/esp/esp-idf=/IDF -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -std=gnu17 -Wno-old-style-declaration -o esp-idf/esp_app_format/CMakeFiles/__idf_esp_app_format.dir/esp_app_desc.c.obj -c /home/abobkov/esp/esp-idf/components/esp_app_format/esp_app_desc.c",
"file": "/home/abobkov/esp/esp-idf/components/esp_app_format/esp_app_desc.c", "file": "/home/abobkov/esp/esp-idf/components/esp_app_format/esp_app_desc.c",
"output": "esp-idf/esp_app_format/CMakeFiles/__idf_esp_app_format.dir/esp_app_desc.c.obj" "output": "esp-idf/esp_app_format/CMakeFiles/__idf_esp_app_format.dir/esp_app_desc.c.obj"
}, },

View File

@@ -332,8 +332,8 @@ set(CONFIG_ENV_GPIO_IN_RANGE_MAX "39")
set(CONFIG_ENV_GPIO_OUT_RANGE_MAX "33") set(CONFIG_ENV_GPIO_OUT_RANGE_MAX "33")
set(CONFIG_BLINK_LED_GPIO "y") set(CONFIG_BLINK_LED_GPIO "y")
set(CONFIG_BLINK_LED_STRIP "") set(CONFIG_BLINK_LED_STRIP "")
set(CONFIG_BLINK_GPIO "5") set(CONFIG_BLINK_GPIO "10")
set(CONFIG_BLINK_PERIOD "1000") set(CONFIG_BLINK_PERIOD "250")
set(CONFIG_COMPILER_OPTIMIZATION_DEBUG "y") set(CONFIG_COMPILER_OPTIMIZATION_DEBUG "y")
set(CONFIG_COMPILER_OPTIMIZATION_SIZE "") set(CONFIG_COMPILER_OPTIMIZATION_SIZE "")
set(CONFIG_COMPILER_OPTIMIZATION_PERF "") set(CONFIG_COMPILER_OPTIMIZATION_PERF "")

View File

@@ -283,8 +283,8 @@
#define CONFIG_ENV_GPIO_IN_RANGE_MAX 39 #define CONFIG_ENV_GPIO_IN_RANGE_MAX 39
#define CONFIG_ENV_GPIO_OUT_RANGE_MAX 33 #define CONFIG_ENV_GPIO_OUT_RANGE_MAX 33
#define CONFIG_BLINK_LED_GPIO 1 #define CONFIG_BLINK_LED_GPIO 1
#define CONFIG_BLINK_GPIO 5 #define CONFIG_BLINK_GPIO 10
#define CONFIG_BLINK_PERIOD 1000 #define CONFIG_BLINK_PERIOD 250
#define CONFIG_COMPILER_OPTIMIZATION_DEBUG 1 #define CONFIG_COMPILER_OPTIMIZATION_DEBUG 1
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1 #define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
#define CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB 1 #define CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB 1

View File

@@ -32,10 +32,10 @@
"APP_PROJECT_VER_FROM_CONFIG": false, "APP_PROJECT_VER_FROM_CONFIG": false,
"APP_REPRODUCIBLE_BUILD": false, "APP_REPRODUCIBLE_BUILD": false,
"APP_RETRIEVE_LEN_ELF_SHA": 9, "APP_RETRIEVE_LEN_ELF_SHA": 9,
"BLINK_GPIO": 5, "BLINK_GPIO": 10,
"BLINK_LED_GPIO": true, "BLINK_LED_GPIO": true,
"BLINK_LED_STRIP": false, "BLINK_LED_STRIP": false,
"BLINK_PERIOD": 1000, "BLINK_PERIOD": 250,
"BOOTLOADER_APP_ROLLBACK_ENABLE": false, "BOOTLOADER_APP_ROLLBACK_ENABLE": false,
"BOOTLOADER_APP_TEST": false, "BOOTLOADER_APP_TEST": false,
"BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG": false, "BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG": false,

View File

@@ -0,0 +1,116 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* ESP32 Linker Script Memory Layout
This file describes the memory layout (memory blocks) as virtual
memory addresses.
esp32.project.ld contains output sections to link compiler output
into these memory blocks.
***
This linker script is passed through the C preprocessor to include
configuration options.
Please use preprocessor features sparingly! Restrict
to simple macros with numeric values, and/or #if/#endif blocks.
*/
/*
* Automatically generated file. DO NOT EDIT.
* Espressif IoT Development Framework (ESP-IDF) 5.2.3 Configuration Header
*/
/* List of deprecated options */
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* CPU instruction prefetch padding size for flash mmap scenario */
_esp_flash_mmap_prefetch_pad_size = 16;
/* CPU instruction prefetch padding size for memory protection scenario */
_esp_memprot_prefetch_pad_size = 0;
/* Memory alignment size for PMS */
_esp_memprot_align_size = 0;
_esp_mmu_block_size = (0x10000);
/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
/* If BT is not built at all */
MEMORY
{
/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
are connected to the data port of the CPU and eg allow bytewise access. */
/* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + 0x0
/* Even though the segment name is iram, it is actually mapped to flash
*/
iram0_2_seg (RX) : org = 0x400D0020, len = 0x330000-0x20
/*
(0x20 offset above is a convenience for the app binary image generation.
Flash cache has 64KB pages. The .bin file which is flashed to the chip
has a 0x18 byte file header, and each segment has a 0x08 byte segment
header. Setting this offset makes it simple to meet the flash cache MMU's
constraint that (paddr % 64KB == vaddr % 64KB).)
*/
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
Enabling Bluetooth & Trace Memory features in menuconfig will decrease
the amount of RAM available.
Note: Length of this section *should* be 0x50000, and this extra DRAM is available
in heap at runtime. However due to static ROM memory usage at this 176KB mark, the
additional static memory temporarily cannot be used.
*/
dram0_0_seg (RW) : org = 0x3FFB0000 + 0,
len = 0x2c200 - 0
/* Flash mapped constant data */
drom0_0_seg (R) : org = 0x3F400020, len = 0x400000-0x20
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
/* RTC fast memory (executable). Persists over deep sleep. */
rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 - 0
/* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */
rtc_data_seg(RW) : org = 0x3ff80000, len = 0x2000 - 0
/* We reduced the size of rtc_iram_seg and rtc_data_seg by ESP_BOOTLOADER_RESERVE_RTC value.
It reserves the amount of RTC fast memory that we use for this memory segment.
This segment is intended for keeping bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
The aim of this is to keep data that will not be moved around and have a fixed address.
org = 0x3ff80000 + 0x2000 - ESP_BOOTLOADER_RESERVE_RTC == SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t)
*/
rtc_fast_reserved_seg(RW) : org = 0x3ff80000 + 0x2000 - 0, len = 0
/* RTC slow memory (data accessible). Persists over deep sleep.
Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
*/
rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000 - ((24))
/* We reduced the size of rtc_slow_seg by RESERVE_RTC_MEM value.
It reserves the amount of RTC slow memory that we use for this memory segment.
This segment is intended for keeping rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
The aim of this is to keep data that will not be moved around and have a fixed address.
org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM
*/
rtc_slow_reserved_seg(RW) : org = 0x50000000 + 0x2000 - ((24)), len = ((24))
/* external memory */
extern_ram_seg(RWX) : org = 0x3F800000,
len = 0x400000
}
_heap_start = _heap_low_start;
_sram1_iram_start = 0x400A0000;
_sram1_iram_len = ( _iram_end > _sram1_iram_start) ? (_iram_end - _sram1_iram_start) : 0;
_heap_end = ALIGN(0x40000000 - _sram1_iram_len - 3, 4);
_data_seg_org = ORIGIN(rtc_data_seg);
/* The lines below define location alias for .rtc.data section based on Kconfig option.
When the option is not defined then use slow memory segment
else the data will be placed in fast memory segment */
REGION_ALIAS("rtc_data_location", rtc_slow_seg );
REGION_ALIAS("default_code_seg", iram0_2_seg);
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
/**
* If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
* also be first in the segment.
*/
ASSERT(_rodata_start == ORIGIN(default_rodata_seg),
".flash.appdesc section must be placed at the beginning of the rodata segment.")

View File

@@ -0,0 +1,449 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Automatically generated file. DO NOT EDIT.
* Espressif IoT Development Framework (ESP-IDF) 5.2.3 Configuration Header
*/
/* List of deprecated options */
/* Default entry point: */
ENTRY(call_start_cpu0);
SECTIONS
{
/* RTC fast memory holds RTC wake stub code,
including from any source file named rtc_wake_stub*.c
*/
.rtc.text :
{
. = ALIGN(4);
mapping[rtc_text]
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
_rtc_text_end = ABSOLUTE(.);
} > rtc_iram_seg
/*
This section is required to skip rtc.text area because rtc_iram_seg and
rtc_data_seg are reflect the same address space on different buses.
*/
.rtc.dummy :
{
_rtc_dummy_start = ABSOLUTE(.);
_rtc_fast_start = ABSOLUTE(.);
. = SIZEOF(.rtc.text);
_rtc_dummy_end = ABSOLUTE(.);
} > rtc_data_seg
/* This section located in RTC FAST Memory area.
It holds data marked with RTC_FAST_ATTR attribute.
See the file "esp_attr.h" for more information.
*/
.rtc.force_fast :
{
. = ALIGN(4);
_rtc_force_fast_start = ABSOLUTE(.);
mapping[rtc_force_fast]
*(.rtc.force_fast .rtc.force_fast.*)
. = ALIGN(4) ;
_rtc_force_fast_end = ABSOLUTE(.);
} > rtc_data_seg
/* RTC data section holds RTC wake stub
data/rodata, including from any source file
named rtc_wake_stub*.c and the data marked with
RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
The memory location of the data is dependent on
CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
*/
.rtc.data :
{
_rtc_data_start = ABSOLUTE(.);
mapping[rtc_data]
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
_rtc_data_end = ABSOLUTE(.);
} > rtc_data_location
/* RTC bss, from any source file named rtc_wake_stub*.c */
.rtc.bss (NOLOAD) :
{
_rtc_bss_start = ABSOLUTE(.);
*rtc_wake_stub*.*(.bss .bss.*)
*rtc_wake_stub*.*(COMMON)
mapping[rtc_bss]
_rtc_bss_end = ABSOLUTE(.);
} > rtc_data_location
/* This section holds data that should not be initialized at power up
and will be retained during deep sleep.
User data marked with RTC_NOINIT_ATTR will be placed
into this section. See the file "esp_attr.h" for more information.
The memory location of the data is dependent on
CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
*/
.rtc_noinit (NOLOAD):
{
. = ALIGN(4);
_rtc_noinit_start = ABSOLUTE(.);
*(.rtc_noinit .rtc_noinit.*)
. = ALIGN(4) ;
_rtc_noinit_end = ABSOLUTE(.);
} > rtc_data_location
/* This section located in RTC SLOW Memory area.
It holds data marked with RTC_SLOW_ATTR attribute.
See the file "esp_attr.h" for more information.
*/
.rtc.force_slow :
{
. = ALIGN(4);
_rtc_force_slow_start = ABSOLUTE(.);
*(.rtc.force_slow .rtc.force_slow.*)
. = ALIGN(4) ;
_rtc_force_slow_end = ABSOLUTE(.);
} > rtc_slow_seg
/**
* This section holds RTC FAST data that should have fixed addresses.
* The data are not initialized at power-up and are retained during deep sleep.
*/
.rtc_fast_reserved (NOLOAD):
{
. = ALIGN(4);
_rtc_fast_reserved_start = ABSOLUTE(.);
/* New data can only be added here to ensure existing data are not moved.
Because data have adhered to the end of the segment and code is relied on it.
>> put new data here << */
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
_rtc_fast_reserved_end = ABSOLUTE(.);
} > rtc_fast_reserved_seg
_rtc_fast_reserved_length = _rtc_fast_reserved_end - _rtc_fast_reserved_start;
ASSERT((_rtc_fast_reserved_length <= LENGTH(rtc_fast_reserved_seg)),
"RTC FAST reserved segment data does not fit.")
/**
* This section holds RTC SLOW data that should have fixed addresses.
* The data are not initialized at power-up and are retained during deep sleep.
*/
.rtc_slow_reserved (NOLOAD):
{
. = ALIGN(4);
_rtc_slow_reserved_start = ABSOLUTE(.);
/* New data can only be added here to ensure existing data are not moved.
Because data have adhered to the end of the segment and code is relied on it.
>> put new data here << */
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
_rtc_slow_reserved_end = ABSOLUTE(.);
} > rtc_slow_reserved_seg
_rtc_slow_reserved_length = _rtc_slow_reserved_end - _rtc_slow_reserved_start;
_rtc_reserved_length = _rtc_slow_reserved_length;
ASSERT((_rtc_slow_reserved_length <= LENGTH(rtc_slow_reserved_seg)),
"RTC SLOW reserved segment data does not fit.")
/* Get size of rtc slow data based on rtc_data_location alias */
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
? (_rtc_force_slow_end - _rtc_data_start)
: (_rtc_force_slow_end - _rtc_force_slow_start);
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
? (_rtc_force_fast_end - _rtc_fast_start)
: (_rtc_noinit_end - _rtc_fast_start);
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
"RTC_SLOW segment data does not fit.")
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
"RTC_FAST segment data does not fit.")
/* Send .iram0 code to iram */
.iram0.vectors :
{
_iram_start = ABSOLUTE(.);
/* Vectors go to IRAM */
_vector_table = ABSOLUTE(.);
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
. = 0x0;
KEEP(*(.WindowVectors.text));
. = 0x180;
KEEP(*(.Level2InterruptVector.text));
. = 0x1c0;
KEEP(*(.Level3InterruptVector.text));
. = 0x200;
KEEP(*(.Level4InterruptVector.text));
. = 0x240;
KEEP(*(.Level5InterruptVector.text));
. = 0x280;
KEEP(*(.DebugExceptionVector.text));
. = 0x2c0;
KEEP(*(.NMIExceptionVector.text));
. = 0x300;
KEEP(*(.KernelExceptionVector.text));
. = 0x340;
KEEP(*(.UserExceptionVector.text));
. = 0x3C0;
KEEP(*(.DoubleExceptionVector.text));
. = 0x400;
_invalid_pc_placeholder = ABSOLUTE(.);
*(.*Vector.literal)
*(.UserEnter.literal);
*(.UserEnter.text);
. = ALIGN (16);
*(.entry.literal)
*(.entry.text)
*(.init.literal)
*(.init)
_init_end = ABSOLUTE(.);
} > iram0_0_seg
.iram0.text :
{
/* Code marked as runnning out of IRAM */
_iram_text_start = ABSOLUTE(.);
mapping[iram0_text]
} > iram0_0_seg
.dram0.data :
{
_data_start = ABSOLUTE(.);
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
mapping[dram0_data]
_data_end = ABSOLUTE(.);
. = ALIGN(4);
} > dram0_0_seg
/**
* This section holds data that won't be initialised when startup.
* This section locates in External RAM region.
*/
.ext_ram_noinit (NOLOAD) :
{
_ext_ram_noinit_start = ABSOLUTE(.);
*(.ext_ram_noinit*)
. = ALIGN(4);
_ext_ram_noinit_end = ABSOLUTE(.);
} > extern_ram_seg
/*This section holds data that should not be initialized at power up.
The section located in Internal SRAM memory region. The macro _NOINIT
can be used as attribute to place data into this section.
See the esp_attr.h file for more information.
*/
.noinit (NOLOAD):
{
. = ALIGN(4);
_noinit_start = ABSOLUTE(.);
*(.noinit .noinit.*)
. = ALIGN(4) ;
_noinit_end = ABSOLUTE(.);
} > dram0_0_seg
/* external memory bss, from any global variable with EXT_RAM_BSS_ATTR attribute*/
.ext_ram.bss (NOLOAD) :
{
_ext_ram_bss_start = ABSOLUTE(.);
mapping[extern_ram]
. = ALIGN(4);
_ext_ram_bss_end = ABSOLUTE(.);
} > extern_ram_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
mapping[dram0_bss]
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
} > dram0_0_seg
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
.flash.appdesc : ALIGN(0x10)
{
_rodata_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.rodata start, this can be used for mmu driver to maintain virtual address */
_rodata_start = ABSOLUTE(.);
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
/* Create an empty gap within this section. Thanks to this, the end of this
* section will match .flah.rodata's begin address. Thus, both sections
* will be merged when creating the final bin image. */
. = ALIGN(ALIGNOF(.flash.rodata));
} >default_rodata_seg
.flash.rodata : ALIGN(0x10)
{
_flash_rodata_start = ABSOLUTE(.);
mapping[flash_rodata]
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table .gcc_except_table.*)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables
Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt
*/
__init_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
/* Addresses of memory regions reserved via
SOC_RESERVE_MEMORY_REGION() */
soc_reserved_memory_region_start = ABSOLUTE(.);
KEEP (*(.reserved_memory_address))
soc_reserved_memory_region_end = ABSOLUTE(.);
/* System init functions registered via ESP_SYSTEM_INIT_FN */
_esp_system_init_fn_array_start = ABSOLUTE(.);
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
_esp_system_init_fn_array_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
_thread_local_start = ABSOLUTE(.);
*(.tdata)
*(.tdata.*)
*(.tbss)
*(.tbss.*)
_thread_local_end = ABSOLUTE(.);
. = ALIGN(4);
} >default_rodata_seg
_flash_rodata_align = ALIGNOF(.flash.rodata);
/*
This section is a place where we dump all the rodata which aren't used at runtime,
so as to avoid binary size increase
*/
.flash.rodata_noload (NOLOAD) :
{
/*
This is a symbol marking the flash.rodata end, this can be used for mmu driver to maintain virtual address
We don't need to include the noload rodata in this section
*/
_rodata_reserved_end = ABSOLUTE(.);
. = ALIGN (4);
mapping[rodata_noload]
} > default_rodata_seg
.flash.text :
{
_stext = .;
_instruction_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.text start, this can be used for mmu driver to maintain virtual address */
_text_start = ABSOLUTE(.);
mapping[flash_text]
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
/** CPU will try to prefetch up to 16 bytes of
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
* safe access to up to 16 bytes after the last real instruction, add
* dummy bytes to ensure this
*/
. += _esp_flash_mmap_prefetch_pad_size;
_text_end = ABSOLUTE(.);
_instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
_etext = .;
/* Similar to _iram_start, this symbol goes here so it is
resolved by addr2line in preference to the first symbol in
the flash.text segment.
*/
_flash_cache_start = ABSOLUTE(0);
} >default_code_seg
/* Marks the end of IRAM code segment */
.iram0.text_end (NOLOAD) :
{
. = ALIGN (4);
_iram_text_end = ABSOLUTE(.);
} > iram0_0_seg
.iram0.data :
{
. = ALIGN(4);
_iram_data_start = ABSOLUTE(.);
mapping[iram0_data]
_iram_data_end = ABSOLUTE(.);
} > iram0_0_seg
.iram0.bss (NOLOAD) :
{
. = ALIGN(4);
_iram_bss_start = ABSOLUTE(.);
mapping[iram0_bss]
_iram_bss_end = ABSOLUTE(.);
. = ALIGN(4);
_iram_end = ABSOLUTE(.);
} > iram0_0_seg
/* Marks the end of data, bss and possibly rodata */
.dram0.heap_start (NOLOAD) :
{
. = ALIGN (8);
/* Lowest possible start address for the heap */
_heap_low_start = ABSOLUTE(.);
} > dram0_0_seg
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* .xt.prop and .xt.lit sections will be used by the debugger and disassembler
* to get more information about raw data present in the code.
* Indeed, it may be required to add some padding at some points in the code
* in order to align a branch/jump destination on a particular bound.
* Padding these instructions will generate null bytes that shall be
* interpreted as data, and not code by the debugger or disassembler.
* This section will only be present in the ELF file, not in the final binary
* For more details, check GCC-212
*/
.xtensa.info 0: { *(.xtensa.info) }
.xt.prop 0 : { *(.xt.prop .xt.prop.* .gnu.linkonce.prop.*) }
.xt.lit 0 : { *(.xt.lit .xt.lit.* .gnu.linkonce.p.*) }
/DISCARD/ :
{
*(.fini)
*(.eh_frame_hdr)
*(.eh_frame)
}
}
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
"IRAM0 segment data does not fit.")
ASSERT(((_heap_low_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")

View File

@@ -1,7 +1,7 @@
{ {
"version": "1.1", "version": "1.1",
"project_name": "ESP-IDF_Robot", "project_name": "ESP-IDF_Robot",
"project_version": "ESP32-Node_Switch-v2.7-112-g8f1974bd", "project_version": "ESP32-Node_Switch-v2.7-114-g363fa2e6-dirty",
"project_path": "/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot", "project_path": "/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot",
"idf_path": "/home/abobkov/esp/esp-idf", "idf_path": "/home/abobkov/esp/esp-idf",
"build_dir": "/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build", "build_dir": "/home/abobkov/MyProjects/ESP-Nodes/ESP-IDF_Robot/build",

View File

@@ -229,7 +229,7 @@ CONFIG_IDF_TOOLCHAIN="gcc"
CONFIG_IDF_TARGET_ARCH_XTENSA=y CONFIG_IDF_TARGET_ARCH_XTENSA=y
CONFIG_IDF_TARGET_ARCH="xtensa" CONFIG_IDF_TARGET_ARCH="xtensa"
CONFIG_IDF_TARGET="esp32" CONFIG_IDF_TARGET="esp32"
CONFIG_IDF_INIT_VERSION="$IDF_INIT_VERSION" CONFIG_IDF_INIT_VERSION="5.2.3"
CONFIG_IDF_TARGET_ESP32=y CONFIG_IDF_TARGET_ESP32=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000

View File

@@ -229,7 +229,7 @@ CONFIG_IDF_TOOLCHAIN="gcc"
CONFIG_IDF_TARGET_ARCH_XTENSA=y CONFIG_IDF_TARGET_ARCH_XTENSA=y
CONFIG_IDF_TARGET_ARCH="xtensa" CONFIG_IDF_TARGET_ARCH="xtensa"
CONFIG_IDF_TARGET="esp32" CONFIG_IDF_TARGET="esp32"
CONFIG_IDF_INIT_VERSION="5.2.3" CONFIG_IDF_INIT_VERSION="$IDF_INIT_VERSION"
CONFIG_IDF_TARGET_ESP32=y CONFIG_IDF_TARGET_ESP32=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
@@ -379,8 +379,8 @@ CONFIG_ENV_GPIO_IN_RANGE_MAX=39
CONFIG_ENV_GPIO_OUT_RANGE_MAX=33 CONFIG_ENV_GPIO_OUT_RANGE_MAX=33
CONFIG_BLINK_LED_GPIO=y CONFIG_BLINK_LED_GPIO=y
# CONFIG_BLINK_LED_STRIP is not set # CONFIG_BLINK_LED_STRIP is not set
CONFIG_BLINK_GPIO=5 CONFIG_BLINK_GPIO=10
CONFIG_BLINK_PERIOD=1000 CONFIG_BLINK_PERIOD=250
# end of Example Configuration # end of Example Configuration
# #