ESP32-Console

This commit is contained in:
2025-01-11 10:00:31 -05:00
parent fa9879ae32
commit a4765d121d
7 changed files with 105 additions and 47 deletions

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@@ -1 +1 @@
368ac5dc70f57bf7c56863bb31a2864148cac742
fa9879ae3230944fd6255f44dfd6d04b1df62835

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@@ -5969,7 +5969,10 @@
"help": "This GPIO is used for UART TX pin.",
"id": "APPTRACE_UART_TX_GPIO",
"name": "APPTRACE_UART_TX_GPIO",
"range": null,
"range": [
0,
46
],
"title": "UART TX on GPIO#",
"type": "int"
},
@@ -5979,7 +5982,10 @@
"help": "This GPIO is used for UART RX pin.",
"id": "APPTRACE_UART_RX_GPIO",
"name": "APPTRACE_UART_RX_GPIO",
"range": null,
"range": [
0,
46
],
"title": "UART RX on GPIO#",
"type": "int"
},
@@ -5989,7 +5995,10 @@
"help": "This baud rate is used for UART.\n\nThe app's maximum baud rate depends on the UART clock source. If Power Management is disabled,\nthe UART clock source is the APB clock and all baud rates in the available range will be sufficiently\naccurate. If Power Management is enabled, REF_TICK clock source is used so the baud rate is divided\nfrom 1MHz. Baud rates above 1Mbps are not possible and values between 500Kbps and 1Mbps may not be\naccurate.",
"id": "APPTRACE_UART_BAUDRATE",
"name": "APPTRACE_UART_BAUDRATE",
"range": null,
"range": [
1200,
8000000
],
"title": "UART baud rate",
"type": "int"
},
@@ -5999,7 +6008,10 @@
"help": "Size of the UART input ring buffer.\nThis size related to the baudrate, system tick frequency and amount of data to transfer.\nThe data placed to this buffer before sent out to the interface.",
"id": "APPTRACE_UART_RX_BUFF_SIZE",
"name": "APPTRACE_UART_RX_BUFF_SIZE",
"range": null,
"range": [
64,
32768
],
"title": "UART RX ring buffer size",
"type": "int"
},
@@ -6009,7 +6021,10 @@
"help": "Size of the UART output ring buffer.\nThis size related to the baudrate, system tick frequency and amount of data to transfer.",
"id": "APPTRACE_UART_TX_BUFF_SIZE",
"name": "APPTRACE_UART_TX_BUFF_SIZE",
"range": null,
"range": [
2048,
32768
],
"title": "UART TX ring buffer size",
"type": "int"
},
@@ -6019,7 +6034,10 @@
"help": "Maximum size of the single message to transfer.",
"id": "APPTRACE_UART_TX_MSG_SIZE",
"name": "APPTRACE_UART_TX_MSG_SIZE",
"range": null,
"range": [
64,
32768
],
"title": "UART TX message size",
"type": "int"
},
@@ -6082,7 +6100,10 @@
"help": "Timeout for flushing last trace data to host in case of panic. In ms.\nUse -1 to disable timeout and wait forever.",
"id": "APPTRACE_ONPANIC_HOST_FLUSH_TMO",
"name": "APPTRACE_ONPANIC_HOST_FLUSH_TMO",
"range": null,
"range": [
-1,
5000
],
"title": "Timeout for flushing last trace data to host on panic",
"type": "int"
},
@@ -6092,7 +6113,10 @@
"help": "Threshold for flushing last trace data to host on panic in post-mortem mode.\nThis is minimal amount of data needed to perform flush. In bytes.",
"id": "APPTRACE_POSTMORTEM_FLUSH_THRESH",
"name": "APPTRACE_POSTMORTEM_FLUSH_THRESH",
"range": null,
"range": [
0,
16384
],
"title": "Threshold for flushing last trace data to host on panic",
"type": "int"
},
@@ -17852,10 +17876,7 @@
"help": "This baud rate is used by both the ESP-IDF Bootloader and the app (including\nboot log output and default standard input/output/error of the app).\n\nThe app's maximum baud rate depends on the UART clock source. If Power Management is disabled,\nthe UART clock source is the APB clock and all baud rates in the available range will be sufficiently\naccurate. If Power Management is enabled, REF_TICK clock source is used so the baud rate is divided\nfrom 1MHz. Baud rates above 1Mbps are not possible and values between 500Kbps and 1Mbps may not be\naccurate.\n\nIf the configuration is different in the Bootloader binary compared to the app binary, UART\nis reconfigured after the bootloader exits and the app starts.",
"id": "ESP_CONSOLE_UART_BAUDRATE",
"name": "ESP_CONSOLE_UART_BAUDRATE",
"range": [
1200,
4000000
],
"range": null,
"title": "UART console baud rate",
"type": "int"
},
@@ -18233,7 +18254,7 @@
"id": "ESP_IPC_TASK_STACK_SIZE",
"name": "ESP_IPC_TASK_STACK_SIZE",
"range": [
512,
2048,
65536
],
"title": "Inter-Processor Call (IPC) task stack size",

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@@ -361,9 +361,20 @@
#define CONFIG_COMPILER_RT_LIB_NAME "gcc"
#define CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE 1
#define CONFIG_APPTRACE_DEST_NONE 1
#define CONFIG_APPTRACE_DEST_UART_NONE 1
#define CONFIG_APPTRACE_DEST_UART 1
#define CONFIG_APPTRACE_DEST_UART_NOUSB 1
#define CONFIG_APPTRACE_DEST_UART1 1
#define CONFIG_APPTRACE_UART_TX_GPIO 12
#define CONFIG_APPTRACE_UART_RX_GPIO 13
#define CONFIG_APPTRACE_UART_BAUDRATE 1000000
#define CONFIG_APPTRACE_UART_RX_BUFF_SIZE 128
#define CONFIG_APPTRACE_UART_TX_BUFF_SIZE 4096
#define CONFIG_APPTRACE_UART_TX_MSG_SIZE 128
#define CONFIG_APPTRACE_UART_TASK_PRIO 1
#define CONFIG_APPTRACE_ENABLE 1
#define CONFIG_APPTRACE_LOCK_ENABLE 1
#define CONFIG_APPTRACE_ONPANIC_HOST_FLUSH_TMO -1
#define CONFIG_APPTRACE_POSTMORTEM_FLUSH_THRESH 0
#define CONFIG_BT_ALARM_MAX_NUM 50
#define CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM 1
#define CONFIG_EFUSE_MAX_BLK_LEN 256
@@ -439,12 +450,11 @@
#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
#define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG 1
#define CONFIG_ESP_CONSOLE_SECONDARY_NONE 1
#define CONFIG_ESP_CONSOLE_UART 1
#define CONFIG_ESP_CONSOLE_UART_NUM 0
#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM 0
#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
#define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED 1
#define CONFIG_ESP_CONSOLE_UART_NUM -1
#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM 3
#define CONFIG_ESP_INT_WDT 1
#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
#define CONFIG_ESP_TASK_WDT_EN 1
@@ -789,9 +799,6 @@
#define CONFIG_BROWNOUT_DET_LVL_SEL_7 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
#define CONFIG_COMPILER_OPTIMIZATION_DEFAULT CONFIG_COMPILER_OPTIMIZATION_DEBUG
#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEBUG
#define CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART
#define CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE
#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
#define CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define CONFIG_ESP32C3_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
#define CONFIG_ESP32C3_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
@@ -806,7 +813,10 @@
#define CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
#define CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
#define CONFIG_ESP32_APPTRACE_ENABLE CONFIG_APPTRACE_ENABLE
#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE CONFIG_APPTRACE_LOCK_ENABLE
#define CONFIG_ESP32_APPTRACE_ONPANIC_HOST_FLUSH_TMO CONFIG_APPTRACE_ONPANIC_HOST_FLUSH_TMO
#define CONFIG_ESP32_APPTRACE_POSTMORTEM_FLUSH_TRAX_THRESH CONFIG_APPTRACE_POSTMORTEM_FLUSH_THRESH
#define CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
#define CONFIG_ESP32_COREDUMP_DATA_FORMAT_ELF CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
#define CONFIG_ESP32_CORE_DUMP_DECODE CONFIG_ESP_COREDUMP_DECODE

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@@ -8,11 +8,25 @@
"ADC_SUPPRESS_DEPRECATE_WARN": false,
"APPTRACE_DEST_JTAG": false,
"APPTRACE_DEST_NONE": true,
"APPTRACE_DEST_UART1": false,
"APPTRACE_DEST_UART_NONE": true,
"APPTRACE_DEST_UART": true,
"APPTRACE_DEST_UART0": false,
"APPTRACE_DEST_UART1": true,
"APPTRACE_DEST_UART_NONE": false,
"APPTRACE_DEST_UART_NOUSB": true,
"APPTRACE_DEST_USB_CDC": false,
"APPTRACE_ENABLE": true,
"APPTRACE_GCOV_ENABLE": false,
"APPTRACE_LOCK_ENABLE": true,
"APPTRACE_ONPANIC_HOST_FLUSH_TMO": -1,
"APPTRACE_POSTMORTEM_FLUSH_THRESH": 0,
"APPTRACE_SV_ENABLE": false,
"APPTRACE_UART_BAUDRATE": 1000000,
"APPTRACE_UART_RX_BUFF_SIZE": 128,
"APPTRACE_UART_RX_GPIO": 13,
"APPTRACE_UART_TASK_PRIO": 1,
"APPTRACE_UART_TX_BUFF_SIZE": 4096,
"APPTRACE_UART_TX_GPIO": 12,
"APPTRACE_UART_TX_MSG_SIZE": 128,
"APP_BUILD_BOOTLOADER": true,
"APP_BUILD_GENERATE_BINARIES": true,
"APP_BUILD_TYPE_APP_2NDBOOT": true,
@@ -142,15 +156,13 @@
"ESP_COEX_EXTERNAL_COEXIST_ENABLE": false,
"ESP_COEX_GPIO_DEBUG": false,
"ESP_CONSOLE_NONE": false,
"ESP_CONSOLE_ROM_SERIAL_PORT_NUM": 0,
"ESP_CONSOLE_ROM_SERIAL_PORT_NUM": 3,
"ESP_CONSOLE_SECONDARY_NONE": true,
"ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG": false,
"ESP_CONSOLE_UART": true,
"ESP_CONSOLE_UART_BAUDRATE": 115200,
"ESP_CONSOLE_UART_CUSTOM": false,
"ESP_CONSOLE_UART_DEFAULT": true,
"ESP_CONSOLE_UART_NUM": 0,
"ESP_CONSOLE_USB_SERIAL_JTAG": false,
"ESP_CONSOLE_UART_DEFAULT": false,
"ESP_CONSOLE_UART_NUM": -1,
"ESP_CONSOLE_USB_SERIAL_JTAG": true,
"ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED": true,
"ESP_COREDUMP_CAPTURE_DRAM": false,
"ESP_COREDUMP_CHECKSUM_CRC32": true,
"ESP_COREDUMP_CHECKSUM_SHA256": false,

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@@ -284,7 +284,7 @@ CONFIG_IDF_TOOLCHAIN="gcc"
CONFIG_IDF_TARGET_ARCH_RISCV=y
CONFIG_IDF_TARGET_ARCH="riscv"
CONFIG_IDF_TARGET="esp32c3"
CONFIG_IDF_INIT_VERSION="$IDF_INIT_VERSION"
CONFIG_IDF_INIT_VERSION="5.3.2"
CONFIG_IDF_TARGET_ESP32C3=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0005