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esp32 temperature node

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Alex B.
2025-10-04 02:16:07 -04:00
parent 7593e878ae
commit a6f3c0110a
1500 changed files with 59 additions and 144304 deletions
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ESP32-IDF_Temperture-Node-v2/build/.bin_timestamp
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ESP32-IDF_Temperture-Node-v2/build/.ninja_deps
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ESP32-IDF_Temperture-Node-v2/build/.ninja_log
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ESP32-IDF_Temperture-Node-v2/build/CMakeCache.txt
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* later. Look for 6 digit vs. 8 digit version number to decide encoding.
* VVVV is no smaller than the current year when a version is released.
*/
#if __INTEL_LLVM_COMPILER < 1000000L
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100)
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 10)
#else
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000)
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100)
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 100)
#endif
#if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
#endif
#if defined(__GNUC__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
#elif defined(__GNUG__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
#endif
#if defined(__GNUC_MINOR__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
#endif
#if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
#endif
#elif defined(__PATHCC__)
# define COMPILER_ID "PathScale"
# define COMPILER_VERSION_MAJOR DEC(__PATHCC__)
# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__)
# if defined(__PATHCC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__)
# endif
#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__)
# define COMPILER_ID "Embarcadero"
# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF)
# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF)
# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF)
#elif defined(__BORLANDC__)
# define COMPILER_ID "Borland"
/* __BORLANDC__ = 0xVRR */
# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
# define COMPILER_ID "Watcom"
/* __WATCOMC__ = VVRR */
# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
# if (__WATCOMC__ % 10) > 0
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
# endif
#elif defined(__WATCOMC__)
# define COMPILER_ID "OpenWatcom"
/* __WATCOMC__ = VVRP + 1100 */
# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
# if (__WATCOMC__ % 10) > 0
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
# endif
#elif defined(__SUNPRO_C)
# define COMPILER_ID "SunPro"
# if __SUNPRO_C >= 0x5100
/* __SUNPRO_C = 0xVRRP */
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12)
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF)
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF)
# else
/* __SUNPRO_CC = 0xVRP */
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8)
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF)
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF)
# endif
#elif defined(__HP_cc)
# define COMPILER_ID "HP"
/* __HP_cc = VVRRPP */
# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000)
# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100)
# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100)
#elif defined(__DECC)
# define COMPILER_ID "Compaq"
/* __DECC_VER = VVRRTPPPP */
# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000)
# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100)
# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000)
#elif defined(__IBMC__) && defined(__COMPILER_VER__)
# define COMPILER_ID "zOS"
/* __IBMC__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
#elif defined(__open_xl__) && defined(__clang__)
# define COMPILER_ID "IBMClang"
# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__)
# define COMPILER_VERSION_MINOR DEC(__open_xl_release__)
# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__)
# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__)
#elif defined(__ibmxl__) && defined(__clang__)
# define COMPILER_ID "XLClang"
# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800
# define COMPILER_ID "XL"
/* __IBMC__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800
# define COMPILER_ID "VisualAge"
/* __IBMC__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
#elif defined(__NVCOMPILER)
# define COMPILER_ID "NVHPC"
# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__)
# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
# if defined(__NVCOMPILER_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__)
# endif
#elif defined(__PGI)
# define COMPILER_ID "PGI"
# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
# if defined(__PGIC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
# endif
#elif defined(__clang__) && defined(__cray__)
# define COMPILER_ID "CrayClang"
# define COMPILER_VERSION_MAJOR DEC(__cray_major__)
# define COMPILER_VERSION_MINOR DEC(__cray_minor__)
# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(_CRAYC)
# define COMPILER_ID "Cray"
# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
#elif defined(__TI_COMPILER_VERSION__)
# define COMPILER_ID "TI"
/* __TI_COMPILER_VERSION__ = VVVRRRPPP */
# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000)
# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000)
#elif defined(__CLANG_FUJITSU)
# define COMPILER_ID "FujitsuClang"
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(__FUJITSU)
# define COMPILER_ID "Fujitsu"
# if defined(__FCC_version__)
# define COMPILER_VERSION __FCC_version__
# elif defined(__FCC_major__)
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
# endif
# if defined(__fcc_version)
# define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
# elif defined(__FCC_VERSION)
# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
# endif
#elif defined(__ghs__)
# define COMPILER_ID "GHS"
/* __GHS_VERSION_NUMBER = VVVVRP */
# ifdef __GHS_VERSION_NUMBER
# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10)
# endif
#elif defined(__TASKING__)
# define COMPILER_ID "Tasking"
# define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000)
# define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100)
# define COMPILER_VERSION_INTERNAL DEC(__VERSION__)
#elif defined(__ORANGEC__)
# define COMPILER_ID "OrangeC"
# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__)
# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__)
# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__)
#elif defined(__TINYC__)
# define COMPILER_ID "TinyCC"
#elif defined(__BCC__)
# define COMPILER_ID "Bruce"
#elif defined(__SCO_VERSION__)
# define COMPILER_ID "SCO"
#elif defined(__ARMCC_VERSION) && !defined(__clang__)
# define COMPILER_ID "ARMCC"
#if __ARMCC_VERSION >= 1000000
/* __ARMCC_VERSION = VRRPPPP */
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
#else
/* __ARMCC_VERSION = VRPPPP */
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
#endif
#elif defined(__clang__) && defined(__apple_build_version__)
# define COMPILER_ID "AppleClang"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
# define COMPILER_ID "ARMClang"
# define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
# define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
# define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100)
# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
#elif defined(__clang__) && defined(__ti__)
# define COMPILER_ID "TIClang"
# define COMPILER_VERSION_MAJOR DEC(__ti_major__)
# define COMPILER_VERSION_MINOR DEC(__ti_minor__)
# define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__)
# define COMPILER_VERSION_INTERNAL DEC(__ti_version__)
#elif defined(__clang__)
# define COMPILER_ID "Clang"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
# define COMPILER_ID "LCC"
# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100)
# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100)
# if defined(__LCC_MINOR__)
# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
# endif
# if defined(__GNUC__) && defined(__GNUC_MINOR__)
# define SIMULATE_ID "GNU"
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
# if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
# endif
#elif defined(__GNUC__)
# define COMPILER_ID "GNU"
# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
# if defined(__GNUC_MINOR__)
# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
# endif
# if defined(__GNUC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
#elif defined(_MSC_VER)
# define COMPILER_ID "MSVC"
/* _MSC_VER = VVRR */
# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
# if defined(_MSC_FULL_VER)
# if _MSC_VER >= 1400
/* _MSC_FULL_VER = VVRRPPPPP */
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
# else
/* _MSC_FULL_VER = VVRRPPPP */
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
# endif
# endif
# if defined(_MSC_BUILD)
# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
# endif
#elif defined(_ADI_COMPILER)
# define COMPILER_ID "ADSP"
#if defined(__VERSIONNUM__)
/* __VERSIONNUM__ = 0xVVRRPPTT */
# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
#endif
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
# define COMPILER_ID "IAR"
# if defined(__VER__) && defined(__ICCARM__)
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
# endif
#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC)
# define COMPILER_ID "SDCC"
# if defined(__SDCC_VERSION_MAJOR)
# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR)
# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR)
# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH)
# else
/* SDCC = VRP */
# define COMPILER_VERSION_MAJOR DEC(SDCC/100)
# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10)
# define COMPILER_VERSION_PATCH DEC(SDCC % 10)
# endif
/* These compilers are either not known or too old to define an
identification macro. Try to identify the platform and guess that
it is the native compiler. */
#elif defined(__hpux) || defined(__hpua)
# define COMPILER_ID "HP"
#else /* unknown compiler */
# define COMPILER_ID ""
#endif
/* Construct the string literal in pieces to prevent the source from
getting matched. Store it in a pointer rather than an array
because some compilers will just produce instructions to fill the
array rather than assigning a pointer to a static array. */
char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
#ifdef SIMULATE_ID
char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
#endif
#ifdef __QNXNTO__
char const* qnxnto = "INFO" ":" "qnxnto[]";
#endif
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
#endif
#define STRINGIFY_HELPER(X) #X
#define STRINGIFY(X) STRINGIFY_HELPER(X)
/* Identify known platforms by name. */
#if defined(__linux) || defined(__linux__) || defined(linux)
# define PLATFORM_ID "Linux"
#elif defined(__MSYS__)
# define PLATFORM_ID "MSYS"
#elif defined(__CYGWIN__)
# define PLATFORM_ID "Cygwin"
#elif defined(__MINGW32__)
# define PLATFORM_ID "MinGW"
#elif defined(__APPLE__)
# define PLATFORM_ID "Darwin"
#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
# define PLATFORM_ID "Windows"
#elif defined(__FreeBSD__) || defined(__FreeBSD)
# define PLATFORM_ID "FreeBSD"
#elif defined(__NetBSD__) || defined(__NetBSD)
# define PLATFORM_ID "NetBSD"
#elif defined(__OpenBSD__) || defined(__OPENBSD)
# define PLATFORM_ID "OpenBSD"
#elif defined(__sun) || defined(sun)
# define PLATFORM_ID "SunOS"
#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
# define PLATFORM_ID "AIX"
#elif defined(__hpux) || defined(__hpux__)
# define PLATFORM_ID "HP-UX"
#elif defined(__HAIKU__)
# define PLATFORM_ID "Haiku"
#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
# define PLATFORM_ID "BeOS"
#elif defined(__QNX__) || defined(__QNXNTO__)
# define PLATFORM_ID "QNX"
#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
# define PLATFORM_ID "Tru64"
#elif defined(__riscos) || defined(__riscos__)
# define PLATFORM_ID "RISCos"
#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
# define PLATFORM_ID "SINIX"
#elif defined(__UNIX_SV__)
# define PLATFORM_ID "UNIX_SV"
#elif defined(__bsdos__)
# define PLATFORM_ID "BSDOS"
#elif defined(_MPRAS) || defined(MPRAS)
# define PLATFORM_ID "MP-RAS"
#elif defined(__osf) || defined(__osf__)
# define PLATFORM_ID "OSF1"
#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
# define PLATFORM_ID "SCO_SV"
#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
# define PLATFORM_ID "ULTRIX"
#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
# define PLATFORM_ID "Xenix"
#elif defined(__WATCOMC__)
# if defined(__LINUX__)
# define PLATFORM_ID "Linux"
# elif defined(__DOS__)
# define PLATFORM_ID "DOS"
# elif defined(__OS2__)
# define PLATFORM_ID "OS2"
# elif defined(__WINDOWS__)
# define PLATFORM_ID "Windows3x"
# elif defined(__VXWORKS__)
# define PLATFORM_ID "VxWorks"
# else /* unknown platform */
# define PLATFORM_ID
# endif
#elif defined(__INTEGRITY)
# if defined(INT_178B)
# define PLATFORM_ID "Integrity178"
# else /* regular Integrity */
# define PLATFORM_ID "Integrity"
# endif
# elif defined(_ADI_COMPILER)
# define PLATFORM_ID "ADSP"
#else /* unknown platform */
# define PLATFORM_ID
#endif
/* For windows compilers MSVC and Intel we can determine
the architecture of the compiler being used. This is because
the compilers do not have flags that can change the architecture,
but rather depend on which compiler is being used
*/
#if defined(_WIN32) && defined(_MSC_VER)
# if defined(_M_IA64)
# define ARCHITECTURE_ID "IA64"
# elif defined(_M_ARM64EC)
# define ARCHITECTURE_ID "ARM64EC"
# elif defined(_M_X64) || defined(_M_AMD64)
# define ARCHITECTURE_ID "x64"
# elif defined(_M_IX86)
# define ARCHITECTURE_ID "X86"
# elif defined(_M_ARM64)
# define ARCHITECTURE_ID "ARM64"
# elif defined(_M_ARM)
# if _M_ARM == 4
# define ARCHITECTURE_ID "ARMV4I"
# elif _M_ARM == 5
# define ARCHITECTURE_ID "ARMV5I"
# else
# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
# endif
# elif defined(_M_MIPS)
# define ARCHITECTURE_ID "MIPS"
# elif defined(_M_SH)
# define ARCHITECTURE_ID "SHx"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__WATCOMC__)
# if defined(_M_I86)
# define ARCHITECTURE_ID "I86"
# elif defined(_M_IX86)
# define ARCHITECTURE_ID "X86"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
# if defined(__ICCARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__ICCRX__)
# define ARCHITECTURE_ID "RX"
# elif defined(__ICCRH850__)
# define ARCHITECTURE_ID "RH850"
# elif defined(__ICCRL78__)
# define ARCHITECTURE_ID "RL78"
# elif defined(__ICCRISCV__)
# define ARCHITECTURE_ID "RISCV"
# elif defined(__ICCAVR__)
# define ARCHITECTURE_ID "AVR"
# elif defined(__ICC430__)
# define ARCHITECTURE_ID "MSP430"
# elif defined(__ICCV850__)
# define ARCHITECTURE_ID "V850"
# elif defined(__ICC8051__)
# define ARCHITECTURE_ID "8051"
# elif defined(__ICCSTM8__)
# define ARCHITECTURE_ID "STM8"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__ghs__)
# if defined(__PPC64__)
# define ARCHITECTURE_ID "PPC64"
# elif defined(__ppc__)
# define ARCHITECTURE_ID "PPC"
# elif defined(__ARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__x86_64__)
# define ARCHITECTURE_ID "x64"
# elif defined(__i386__)
# define ARCHITECTURE_ID "X86"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__clang__) && defined(__ti__)
# if defined(__ARM_ARCH)
# define ARCHITECTURE_ID "ARM"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__TI_COMPILER_VERSION__)
# if defined(__TI_ARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__MSP430__)
# define ARCHITECTURE_ID "MSP430"
# elif defined(__TMS320C28XX__)
# define ARCHITECTURE_ID "TMS320C28x"
# elif defined(__TMS320C6X__) || defined(_TMS320C6X)
# define ARCHITECTURE_ID "TMS320C6x"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
# elif defined(__ADSPSHARC__)
# define ARCHITECTURE_ID "SHARC"
# elif defined(__ADSPBLACKFIN__)
# define ARCHITECTURE_ID "Blackfin"
#elif defined(__TASKING__)
# if defined(__CTC__) || defined(__CPTC__)
# define ARCHITECTURE_ID "TriCore"
# elif defined(__CMCS__)
# define ARCHITECTURE_ID "MCS"
# elif defined(__CARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__CARC__)
# define ARCHITECTURE_ID "ARC"
# elif defined(__C51__)
# define ARCHITECTURE_ID "8051"
# elif defined(__CPCP__)
# define ARCHITECTURE_ID "PCP"
# else
# define ARCHITECTURE_ID ""
# endif
#else
# define ARCHITECTURE_ID
#endif
/* Convert integer to decimal digit literals. */
#define DEC(n) \
('0' + (((n) / 10000000)%10)), \
('0' + (((n) / 1000000)%10)), \
('0' + (((n) / 100000)%10)), \
('0' + (((n) / 10000)%10)), \
('0' + (((n) / 1000)%10)), \
('0' + (((n) / 100)%10)), \
('0' + (((n) / 10)%10)), \
('0' + ((n) % 10))
/* Convert integer to hex digit literals. */
#define HEX(n) \
('0' + ((n)>>28 & 0xF)), \
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12
ESP32-IDF_Temperture-Node-v2/build/bootloader/config.env
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@@ -1,12 +0,0 @@
{
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ESP32-IDF_Temperture-Node-v2/build/bootloader/config/sdkconfig.h
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@@ -1,495 +0,0 @@
/*
* Automatically generated file. DO NOT EDIT.
* Espressif IoT Development Framework (ESP-IDF) 5.4.1 Configuration Header
*/
#pragma once
#define CONFIG_SOC_BROWNOUT_RESET_SUPPORTED "Not determined"
#define CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED "Not determined"
#define CONFIG_SOC_DPORT_WORKAROUND "Not determined"
#define CONFIG_SOC_CAPS_ECO_VER_MAX 301
#define CONFIG_SOC_ADC_SUPPORTED 1
#define CONFIG_SOC_DAC_SUPPORTED 1
#define CONFIG_SOC_UART_SUPPORTED 1
#define CONFIG_SOC_MCPWM_SUPPORTED 1
#define CONFIG_SOC_GPTIMER_SUPPORTED 1
#define CONFIG_SOC_SDMMC_HOST_SUPPORTED 1
#define CONFIG_SOC_BT_SUPPORTED 1
#define CONFIG_SOC_PCNT_SUPPORTED 1
#define CONFIG_SOC_PHY_SUPPORTED 1
#define CONFIG_SOC_WIFI_SUPPORTED 1
#define CONFIG_SOC_SDIO_SLAVE_SUPPORTED 1
#define CONFIG_SOC_TWAI_SUPPORTED 1
#define CONFIG_SOC_EFUSE_SUPPORTED 1
#define CONFIG_SOC_EMAC_SUPPORTED 1
#define CONFIG_SOC_ULP_SUPPORTED 1
#define CONFIG_SOC_CCOMP_TIMER_SUPPORTED 1
#define CONFIG_SOC_RTC_FAST_MEM_SUPPORTED 1
#define CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED 1
#define CONFIG_SOC_RTC_MEM_SUPPORTED 1
#define CONFIG_SOC_I2S_SUPPORTED 1
#define CONFIG_SOC_RMT_SUPPORTED 1
#define CONFIG_SOC_SDM_SUPPORTED 1
#define CONFIG_SOC_GPSPI_SUPPORTED 1
#define CONFIG_SOC_LEDC_SUPPORTED 1
#define CONFIG_SOC_I2C_SUPPORTED 1
#define CONFIG_SOC_SUPPORT_COEXISTENCE 1
#define CONFIG_SOC_AES_SUPPORTED 1
#define CONFIG_SOC_MPI_SUPPORTED 1
#define CONFIG_SOC_SHA_SUPPORTED 1
#define CONFIG_SOC_FLASH_ENC_SUPPORTED 1
#define CONFIG_SOC_SECURE_BOOT_SUPPORTED 1
#define CONFIG_SOC_TOUCH_SENSOR_SUPPORTED 1
#define CONFIG_SOC_BOD_SUPPORTED 1
#define CONFIG_SOC_ULP_FSM_SUPPORTED 1
#define CONFIG_SOC_CLK_TREE_SUPPORTED 1
#define CONFIG_SOC_MPU_SUPPORTED 1
#define CONFIG_SOC_WDT_SUPPORTED 1
#define CONFIG_SOC_SPI_FLASH_SUPPORTED 1
#define CONFIG_SOC_RNG_SUPPORTED 1
#define CONFIG_SOC_LIGHT_SLEEP_SUPPORTED 1
#define CONFIG_SOC_DEEP_SLEEP_SUPPORTED 1
#define CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT 1
#define CONFIG_SOC_PM_SUPPORTED 1
#define CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL 5
#define CONFIG_SOC_XTAL_SUPPORT_26M 1
#define CONFIG_SOC_XTAL_SUPPORT_40M 1
#define CONFIG_SOC_XTAL_SUPPORT_AUTO_DETECT 1
#define CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED 1
#define CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED 1
#define CONFIG_SOC_ADC_DMA_SUPPORTED 1
#define CONFIG_SOC_ADC_PERIPH_NUM 2
#define CONFIG_SOC_ADC_MAX_CHANNEL_NUM 10
#define CONFIG_SOC_ADC_ATTEN_NUM 4
#define CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM 2
#define CONFIG_SOC_ADC_PATT_LEN_MAX 16
#define CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH 9
#define CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH 12
#define CONFIG_SOC_ADC_DIGI_RESULT_BYTES 2
#define CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV 4
#define CONFIG_SOC_ADC_DIGI_MONITOR_NUM 0
#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH 2
#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW 20
#define CONFIG_SOC_ADC_RTC_MIN_BITWIDTH 9
#define CONFIG_SOC_ADC_RTC_MAX_BITWIDTH 12
#define CONFIG_SOC_ADC_SHARED_POWER 1
#define CONFIG_SOC_SHARED_IDCACHE_SUPPORTED 1
#define CONFIG_SOC_IDCACHE_PER_CORE 1
#define CONFIG_SOC_CPU_CORES_NUM 2
#define CONFIG_SOC_CPU_INTR_NUM 32
#define CONFIG_SOC_CPU_HAS_FPU 1
#define CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES 1
#define CONFIG_SOC_CPU_BREAKPOINTS_NUM 2
#define CONFIG_SOC_CPU_WATCHPOINTS_NUM 2
#define CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64
#define CONFIG_SOC_DAC_CHAN_NUM 2
#define CONFIG_SOC_DAC_RESOLUTION 8
#define CONFIG_SOC_DAC_DMA_16BIT_ALIGN 1
#define CONFIG_SOC_GPIO_PORT 1
#define CONFIG_SOC_GPIO_PIN_COUNT 40
#define CONFIG_SOC_GPIO_VALID_GPIO_MASK 0xFFFFFFFFFF
#define CONFIG_SOC_GPIO_IN_RANGE_MAX 39
#define CONFIG_SOC_GPIO_OUT_RANGE_MAX 33
#define CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0xEF0FEA
#define CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX 1
#define CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM 3
#define CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP 1
#define CONFIG_SOC_I2C_NUM 2
#define CONFIG_SOC_HP_I2C_NUM 2
#define CONFIG_SOC_I2C_FIFO_LEN 32
#define CONFIG_SOC_I2C_CMD_REG_NUM 16
#define CONFIG_SOC_I2C_SUPPORT_SLAVE 1
#define CONFIG_SOC_I2C_SUPPORT_APB 1
#define CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR 1
#define CONFIG_SOC_I2C_STOP_INDEPENDENT 1
#define CONFIG_SOC_I2S_NUM 2
#define CONFIG_SOC_I2S_HW_VERSION_1 1
#define CONFIG_SOC_I2S_SUPPORTS_APLL 1
#define CONFIG_SOC_I2S_SUPPORTS_PLL_F160M 1
#define CONFIG_SOC_I2S_SUPPORTS_PDM 1
#define CONFIG_SOC_I2S_SUPPORTS_PDM_TX 1
#define CONFIG_SOC_I2S_PDM_MAX_TX_LINES 1
#define CONFIG_SOC_I2S_SUPPORTS_PDM_RX 1
#define CONFIG_SOC_I2S_PDM_MAX_RX_LINES 1
#define CONFIG_SOC_I2S_SUPPORTS_ADC_DAC 1
#define CONFIG_SOC_I2S_SUPPORTS_ADC 1
#define CONFIG_SOC_I2S_SUPPORTS_DAC 1
#define CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA 1
#define CONFIG_SOC_I2S_MAX_DATA_WIDTH 24
#define CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD 1
#define CONFIG_SOC_I2S_LCD_I80_VARIANT 1
#define CONFIG_SOC_LCD_I80_SUPPORTED 1
#define CONFIG_SOC_LCD_I80_BUSES 2
#define CONFIG_SOC_LCD_I80_BUS_WIDTH 24
#define CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX 1
#define CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK 1
#define CONFIG_SOC_LEDC_SUPPORT_REF_TICK 1
#define CONFIG_SOC_LEDC_SUPPORT_HS_MODE 1
#define CONFIG_SOC_LEDC_TIMER_NUM 4
#define CONFIG_SOC_LEDC_CHANNEL_NUM 8
#define CONFIG_SOC_LEDC_TIMER_BIT_WIDTH 20
#define CONFIG_SOC_MCPWM_GROUPS 2
#define CONFIG_SOC_MCPWM_TIMERS_PER_GROUP 3
#define CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP 3
#define CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR 2
#define CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR 2
#define CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR 2
#define CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP 3
#define CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP 1
#define CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER 3
#define CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP 3
#define CONFIG_SOC_MMU_PERIPH_NUM 2
#define CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM 3
#define CONFIG_SOC_MPU_MIN_REGION_SIZE 0x20000000
#define CONFIG_SOC_MPU_REGIONS_MAX_NUM 8
#define CONFIG_SOC_PCNT_GROUPS 1
#define CONFIG_SOC_PCNT_UNITS_PER_GROUP 8
#define CONFIG_SOC_PCNT_CHANNELS_PER_UNIT 2
#define CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT 2
#define CONFIG_SOC_RMT_GROUPS 1
#define CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP 8
#define CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP 8
#define CONFIG_SOC_RMT_CHANNELS_PER_GROUP 8
#define CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL 64
#define CONFIG_SOC_RMT_SUPPORT_REF_TICK 1
#define CONFIG_SOC_RMT_SUPPORT_APB 1
#define CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT 1
#define CONFIG_SOC_RTCIO_PIN_COUNT 18
#define CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1
#define CONFIG_SOC_RTCIO_HOLD_SUPPORTED 1
#define CONFIG_SOC_RTCIO_WAKE_SUPPORTED 1
#define CONFIG_SOC_SDM_GROUPS 1
#define CONFIG_SOC_SDM_CHANNELS_PER_GROUP 8
#define CONFIG_SOC_SDM_CLK_SUPPORT_APB 1
#define CONFIG_SOC_SPI_HD_BOTH_INOUT_SUPPORTED 1
#define CONFIG_SOC_SPI_AS_CS_SUPPORTED 1
#define CONFIG_SOC_SPI_PERIPH_NUM 3
#define CONFIG_SOC_SPI_DMA_CHAN_NUM 2
#define CONFIG_SOC_SPI_MAX_CS_NUM 3
#define CONFIG_SOC_SPI_SUPPORT_CLK_APB 1
#define CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE 64
#define CONFIG_SOC_SPI_MAX_PRE_DIVIDER 8192
#define CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
#define CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
#define CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED 1
#define CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
#define CONFIG_SOC_TIMER_GROUPS 2
#define CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP 2
#define CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH 64
#define CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS 4
#define CONFIG_SOC_TIMER_GROUP_SUPPORT_APB 1
#define CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO 32
#define CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI 16
#define CONFIG_SOC_TOUCH_SENSOR_VERSION 1
#define CONFIG_SOC_TOUCH_SENSOR_NUM 10
#define CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM 1
#define CONFIG_SOC_TWAI_CONTROLLER_NUM 1
#define CONFIG_SOC_TWAI_BRP_MIN 2
#define CONFIG_SOC_TWAI_CLK_SUPPORT_APB 1
#define CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT 1
#define CONFIG_SOC_UART_NUM 3
#define CONFIG_SOC_UART_HP_NUM 3
#define CONFIG_SOC_UART_SUPPORT_APB_CLK 1
#define CONFIG_SOC_UART_SUPPORT_REF_TICK 1
#define CONFIG_SOC_UART_FIFO_LEN 128
#define CONFIG_SOC_UART_BITRATE_MAX 5000000
#define CONFIG_SOC_SPIRAM_SUPPORTED 1
#define CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE 1
#define CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG 1
#define CONFIG_SOC_SHA_ENDIANNESS_BE 1
#define CONFIG_SOC_SHA_SUPPORT_SHA1 1
#define CONFIG_SOC_SHA_SUPPORT_SHA256 1
#define CONFIG_SOC_SHA_SUPPORT_SHA384 1
#define CONFIG_SOC_SHA_SUPPORT_SHA512 1
#define CONFIG_SOC_MPI_MEM_BLOCKS_NUM 4
#define CONFIG_SOC_MPI_OPERATIONS_NUM 1
#define CONFIG_SOC_RSA_MAX_BIT_LEN 4096
#define CONFIG_SOC_AES_SUPPORT_AES_128 1
#define CONFIG_SOC_AES_SUPPORT_AES_192 1
#define CONFIG_SOC_AES_SUPPORT_AES_256 1
#define CONFIG_SOC_SECURE_BOOT_V1 1
#define CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 1
#define CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX 32
#define CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE 21
#define CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP 1
#define CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP 1
#define CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP 1
#define CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP 1
#define CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD 1
#define CONFIG_SOC_PM_SUPPORT_RTC_FAST_MEM_PD 1
#define CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD 1
#define CONFIG_SOC_PM_SUPPORT_RC_FAST_PD 1
#define CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD 1
#define CONFIG_SOC_PM_SUPPORT_MODEM_PD 1
#define CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED 1
#define CONFIG_SOC_PM_MODEM_PD_BY_SW 1
#define CONFIG_SOC_CLK_APLL_SUPPORTED 1
#define CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED 1
#define CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 1
#define CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION 1
#define CONFIG_SOC_CLK_XTAL32K_SUPPORTED 1
#define CONFIG_SOC_SDMMC_USE_IOMUX 1
#define CONFIG_SOC_SDMMC_NUM_SLOTS 2
#define CONFIG_SOC_WIFI_WAPI_SUPPORT 1
#define CONFIG_SOC_WIFI_CSI_SUPPORT 1
#define CONFIG_SOC_WIFI_MESH_SUPPORT 1
#define CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW 1
#define CONFIG_SOC_WIFI_NAN_SUPPORT 1
#define CONFIG_SOC_BLE_SUPPORTED 1
#define CONFIG_SOC_BLE_MESH_SUPPORTED 1
#define CONFIG_SOC_BT_CLASSIC_SUPPORTED 1
#define CONFIG_SOC_BLUFI_SUPPORTED 1
#define CONFIG_SOC_BT_H2C_ENC_KEY_CTRL_ENH_VSC_SUPPORTED 1
#define CONFIG_SOC_ULP_HAS_ADC 1
#define CONFIG_SOC_PHY_COMBO_MODULE 1
#define CONFIG_SOC_EMAC_RMII_CLK_OUT_INTERNAL_LOOPBACK 1
#define CONFIG_IDF_CMAKE 1
#define CONFIG_IDF_TOOLCHAIN "gcc"
#define CONFIG_IDF_TOOLCHAIN_GCC 1
#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
#define CONFIG_IDF_TARGET_ARCH "xtensa"
#define CONFIG_IDF_TARGET "esp32"
#define CONFIG_IDF_INIT_VERSION "5.4.1"
#define CONFIG_IDF_TARGET_ESP32 1
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000
#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
#define CONFIG_APP_BUILD_BOOTLOADER 1
#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
#define CONFIG_BOOTLOADER_COMPILE_TIME_DATE 1
#define CONFIG_BOOTLOADER_PROJECT_VER 1
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000
#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
#define CONFIG_BOOTLOADER_LOG_LEVEL_INFO 1
#define CONFIG_BOOTLOADER_LOG_LEVEL 3
#define CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS 1
#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
#define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
#define CONFIG_BOOTLOADER_WDT_ENABLE 1
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0
#define CONFIG_SECURE_BOOT_V1_SUPPORTED 1
#define CONFIG_APP_COMPILE_TIME_DATE 1
#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 9
#define CONFIG_ESP_ROM_HAS_CRC_LE 1
#define CONFIG_ESP_ROM_HAS_CRC_BE 1
#define CONFIG_ESP_ROM_HAS_MZ_CRC32 1
#define CONFIG_ESP_ROM_HAS_JPEG_DECODE 1
#define CONFIG_ESP_ROM_HAS_UART_BUF_SWITCH 1
#define CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND 1
#define CONFIG_ESP_ROM_HAS_NEWLIB 1
#define CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT 1
#define CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME 1
#define CONFIG_ESP_ROM_HAS_SW_FLOAT 1
#define CONFIG_ESP_ROM_USB_OTG_NUM -1
#define CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM -1
#define CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB 1
#define CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC 1
#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
#define CONFIG_ESPTOOLPY_FLASHFREQ "40m"
#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
#define CONFIG_PARTITION_TABLE_MD5 1
#define CONFIG_COMPILER_OPTIMIZATION_DEBUG 1
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
#define CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE 1
#define CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB 1
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
#define CONFIG_COMPILER_STACK_CHECK_MODE_NONE 1
#define CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS 1
#define CONFIG_COMPILER_RT_LIB_GCCLIB 1
#define CONFIG_COMPILER_RT_LIB_NAME "gcc"
#define CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING 1
#define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1
#define CONFIG_EFUSE_MAX_BLK_LEN 192
#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
#define CONFIG_ESP32_REV_MIN_0 1
#define CONFIG_ESP32_REV_MIN 0
#define CONFIG_ESP32_REV_MIN_FULL 0
#define CONFIG_ESP_REV_MIN_FULL 0
#define CONFIG_ESP32_REV_MAX_FULL 399
#define CONFIG_ESP_REV_MAX_FULL 399
#define CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL 0
#define CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL 99
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP 1
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH 1
#define CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR 1
#define CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES 4
#define CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR 1
#define CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES 4
#define CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND 1
#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 2000
#define CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS 1
#define CONFIG_RTC_CLK_SRC_INT_RC 1
#define CONFIG_RTC_CLK_CAL_CYCLES 1024
#define CONFIG_PERIPH_CTRL_FUNC_IN_IRAM 1
#define CONFIG_XTAL_FREQ_40 1
#define CONFIG_XTAL_FREQ 40
#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 1
#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
#define CONFIG_ESP32_TRACEMEM_RESERVE_DRAM 0x0
#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
#define CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS 0
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2304
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 3584
#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
#define CONFIG_ESP_CONSOLE_UART 1
#define CONFIG_ESP_CONSOLE_UART_NUM 0
#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM 0
#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
#define CONFIG_ESP_INT_WDT 1
#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
#define CONFIG_ESP_TASK_WDT_EN 1
#define CONFIG_ESP_TASK_WDT_INIT 1
#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 1
#define CONFIG_ESP_DEBUG_OCDAWARE 1
#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
#define CONFIG_ESP_BROWNOUT_DET 1
#define CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0 1
#define CONFIG_ESP_BROWNOUT_DET_LVL 0
#define CONFIG_ESP_SYSTEM_BROWNOUT_INTR 1
#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
#define CONFIG_ESP_IPC_ISR_ENABLE 1
#define CONFIG_FREERTOS_HZ 100
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1536
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
#define CONFIG_FREERTOS_USE_TIMERS 1
#define CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME "Tmr Svc"
#define CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY 1
#define CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY 0x7FFFFFFF
#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
#define CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES 1
#define CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER 1
#define CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS 1
#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
#define CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER 1
#define CONFIG_FREERTOS_CORETIMER_0 1
#define CONFIG_FREERTOS_SYSTICK_USES_CCOUNT 1
#define CONFIG_FREERTOS_PORT 1
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
#define CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH 1
#define CONFIG_FREERTOS_NUMBER_OF_CORES 2
#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
#define CONFIG_LOG_DEFAULT_LEVEL 3
#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
#define CONFIG_LOG_MAXIMUM_LEVEL 3
#define CONFIG_LOG_DYNAMIC_LEVEL_CONTROL 1
#define CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST 1
#define CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP 1
#define CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE 31
#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
#define CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT 1
#define CONFIG_MMU_PAGE_SIZE_64KB 1
#define CONFIG_MMU_PAGE_MODE "64KB"
#define CONFIG_MMU_PAGE_SIZE 0x10000
#define CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC 1
#define CONFIG_SPI_FLASH_BROWNOUT_RESET 1
#define CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US 50
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20
#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 1
#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 8192
#define CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED 1
#define CONFIG_SPI_FLASH_VENDOR_GD_SUPPORTED 1
#define CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORTED 1
#define CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORTED 1
#define CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORTED 1
#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
/* List of deprecated options */
#define CONFIG_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
#define CONFIG_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
#define CONFIG_BROWNOUT_DET_LVL_SEL_0 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0
#define CONFIG_COMPILER_OPTIMIZATION_DEFAULT CONFIG_COMPILER_OPTIMIZATION_DEBUG
#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEBUG
#define CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART
#define CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE
#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
#define CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define CONFIG_ESP32_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
#define CONFIG_ESP32_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
#define CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0
#define CONFIG_ESP32_DEBUG_OCDAWARE CONFIG_ESP_DEBUG_OCDAWARE
#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_160 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
#define CONFIG_ESP32_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_RTC_CLK_SRC_INT_RC
#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
#define CONFIG_ESP32_XTAL_FREQ CONFIG_XTAL_FREQ
#define CONFIG_ESP32_XTAL_FREQ_40 CONFIG_XTAL_FREQ_40
#define CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY
#define CONFIG_ESP_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
#define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
#define CONFIG_LOG_BOOTLOADER_LEVEL CONFIG_BOOTLOADER_LOG_LEVEL
#define CONFIG_LOG_BOOTLOADER_LEVEL_INFO CONFIG_BOOTLOADER_LOG_LEVEL_INFO
#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
#define CONFIG_MONITOR_BAUD CONFIG_ESPTOOLPY_MONITOR_BAUD
#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES
#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
#define CONFIG_OPTIMIZATION_ASSERTION_LEVEL CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEBUG
#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
#define CONFIG_STACK_CHECK_NONE CONFIG_COMPILER_STACK_CHECK_MODE_NONE
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
#define CONFIG_TRACEMEM_RESERVE_DRAM CONFIG_ESP32_TRACEMEM_RESERVE_DRAM

611
ESP32-IDF_Temperture-Node-v2/build/bootloader/config/sdkconfig.json
View File

@@ -1,611 +0,0 @@
{
"APP_BUILD_BOOTLOADER": true,
"APP_BUILD_GENERATE_BINARIES": true,
"APP_BUILD_TYPE_APP_2NDBOOT": true,
"APP_BUILD_TYPE_RAM": false,
"APP_BUILD_USE_FLASH_SECTIONS": true,
"APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS": false,
"APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS": false,
"APP_COMPILE_TIME_DATE": true,
"APP_EXCLUDE_PROJECT_NAME_VAR": false,
"APP_EXCLUDE_PROJECT_VER_VAR": false,
"APP_NO_BLOBS": false,
"APP_PROJECT_VER_FROM_CONFIG": false,
"APP_REPRODUCIBLE_BUILD": false,
"APP_RETRIEVE_LEN_ELF_SHA": 9,
"BOOTLOADER_APP_ROLLBACK_ENABLE": false,
"BOOTLOADER_APP_TEST": false,
"BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG": false,
"BOOTLOADER_COMPILER_OPTIMIZATION_NONE": false,
"BOOTLOADER_COMPILER_OPTIMIZATION_PERF": false,
"BOOTLOADER_COMPILER_OPTIMIZATION_SIZE": true,
"BOOTLOADER_COMPILE_TIME_DATE": true,
"BOOTLOADER_CUSTOM_RESERVE_RTC": false,
"BOOTLOADER_FACTORY_RESET": false,
"BOOTLOADER_FLASH_DC_AWARE": false,
"BOOTLOADER_FLASH_XMC_SUPPORT": true,
"BOOTLOADER_LOG_COLORS": false,
"BOOTLOADER_LOG_LEVEL": 3,
"BOOTLOADER_LOG_LEVEL_DEBUG": false,
"BOOTLOADER_LOG_LEVEL_ERROR": false,
"BOOTLOADER_LOG_LEVEL_INFO": true,
"BOOTLOADER_LOG_LEVEL_NONE": false,
"BOOTLOADER_LOG_LEVEL_VERBOSE": false,
"BOOTLOADER_LOG_LEVEL_WARN": false,
"BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS": true,
"BOOTLOADER_OFFSET_IN_FLASH": 4096,
"BOOTLOADER_PROJECT_VER": 1,
"BOOTLOADER_REGION_PROTECTION_ENABLE": true,
"BOOTLOADER_RESERVE_RTC_SIZE": 0,
"BOOTLOADER_SKIP_VALIDATE_ALWAYS": false,
"BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP": false,
"BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON": false,
"BOOTLOADER_VDDSDIO_BOOST_1_8V": false,
"BOOTLOADER_VDDSDIO_BOOST_1_9V": true,
"BOOTLOADER_WDT_DISABLE_IN_USER_CODE": false,
"BOOTLOADER_WDT_ENABLE": true,
"BOOTLOADER_WDT_TIME_MS": 9000,
"COMPILER_ASSERT_NDEBUG_EVALUATE": true,
"COMPILER_CXX_EXCEPTIONS": false,
"COMPILER_CXX_RTTI": false,
"COMPILER_DISABLE_DEFAULT_ERRORS": true,
"COMPILER_DISABLE_GCC12_WARNINGS": false,
"COMPILER_DISABLE_GCC13_WARNINGS": false,
"COMPILER_DISABLE_GCC14_WARNINGS": false,
"COMPILER_DUMP_RTL_FILES": false,
"COMPILER_FLOAT_LIB_FROM_GCCLIB": true,
"COMPILER_HIDE_PATHS_MACROS": true,
"COMPILER_NO_MERGE_CONSTANTS": false,
"COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE": false,
"COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE": true,
"COMPILER_OPTIMIZATION_ASSERTIONS_SILENT": false,
"COMPILER_OPTIMIZATION_ASSERTION_LEVEL": 2,
"COMPILER_OPTIMIZATION_CHECKS_SILENT": false,
"COMPILER_OPTIMIZATION_DEBUG": true,
"COMPILER_OPTIMIZATION_NONE": false,
"COMPILER_OPTIMIZATION_PERF": false,
"COMPILER_OPTIMIZATION_SIZE": false,
"COMPILER_ORPHAN_SECTIONS_PLACE": false,
"COMPILER_ORPHAN_SECTIONS_WARNING": true,
"COMPILER_RT_LIB_GCCLIB": true,
"COMPILER_RT_LIB_NAME": "gcc",
"COMPILER_STACK_CHECK_MODE_ALL": false,
"COMPILER_STACK_CHECK_MODE_NONE": true,
"COMPILER_STACK_CHECK_MODE_NORM": false,
"COMPILER_STACK_CHECK_MODE_STRONG": false,
"COMPILER_STATIC_ANALYZER": false,
"COMPILER_WARN_WRITE_STRINGS": false,
"EFUSE_CODE_SCHEME_COMPAT_3_4": true,
"EFUSE_CODE_SCHEME_COMPAT_NONE": false,
"EFUSE_CODE_SCHEME_COMPAT_REPEAT": false,
"EFUSE_CUSTOM_TABLE": false,
"EFUSE_MAX_BLK_LEN": 192,
"EFUSE_VIRTUAL": false,
"ESP32_DISABLE_BASIC_ROM_CONSOLE": false,
"ESP32_REV_MAX_FULL": 399,
"ESP32_REV_MIN": 0,
"ESP32_REV_MIN_0": true,
"ESP32_REV_MIN_1": false,
"ESP32_REV_MIN_1_1": false,
"ESP32_REV_MIN_2": false,
"ESP32_REV_MIN_3": false,
"ESP32_REV_MIN_3_1": false,
"ESP32_REV_MIN_FULL": 0,
"ESP32_TRACEMEM_RESERVE_DRAM": 0,
"ESP32_TRAX": false,
"ESP32_UNIVERSAL_MAC_ADDRESSES": 4,
"ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR": true,
"ESP32_UNIVERSAL_MAC_ADDRESSES_TWO": false,
"ESP32_USE_FIXED_STATIC_RAM_SIZE": false,
"ESPTOOLPY_AFTER": "hard_reset",
"ESPTOOLPY_AFTER_NORESET": false,
"ESPTOOLPY_AFTER_RESET": true,
"ESPTOOLPY_BEFORE": "default_reset",
"ESPTOOLPY_BEFORE_NORESET": false,
"ESPTOOLPY_BEFORE_RESET": true,
"ESPTOOLPY_FLASHFREQ": "40m",
"ESPTOOLPY_FLASHFREQ_20M": false,
"ESPTOOLPY_FLASHFREQ_26M": false,
"ESPTOOLPY_FLASHFREQ_40M": true,
"ESPTOOLPY_FLASHFREQ_80M": false,
"ESPTOOLPY_FLASHMODE": "dio",
"ESPTOOLPY_FLASHMODE_DIO": true,
"ESPTOOLPY_FLASHMODE_DOUT": false,
"ESPTOOLPY_FLASHMODE_QIO": false,
"ESPTOOLPY_FLASHMODE_QOUT": false,
"ESPTOOLPY_FLASHSIZE": "2MB",
"ESPTOOLPY_FLASHSIZE_128MB": false,
"ESPTOOLPY_FLASHSIZE_16MB": false,
"ESPTOOLPY_FLASHSIZE_1MB": false,
"ESPTOOLPY_FLASHSIZE_2MB": true,
"ESPTOOLPY_FLASHSIZE_32MB": false,
"ESPTOOLPY_FLASHSIZE_4MB": false,
"ESPTOOLPY_FLASHSIZE_64MB": false,
"ESPTOOLPY_FLASHSIZE_8MB": false,
"ESPTOOLPY_FLASH_SAMPLE_MODE_STR": true,
"ESPTOOLPY_HEADER_FLASHSIZE_UPDATE": false,
"ESPTOOLPY_MONITOR_BAUD": 115200,
"ESPTOOLPY_NO_STUB": false,
"ESP_BROWNOUT_DET": true,
"ESP_BROWNOUT_DET_LVL": 0,
"ESP_BROWNOUT_DET_LVL_SEL_0": true,
"ESP_BROWNOUT_DET_LVL_SEL_1": false,
"ESP_BROWNOUT_DET_LVL_SEL_2": false,
"ESP_BROWNOUT_DET_LVL_SEL_3": false,
"ESP_BROWNOUT_DET_LVL_SEL_4": false,
"ESP_BROWNOUT_DET_LVL_SEL_5": false,
"ESP_BROWNOUT_DET_LVL_SEL_6": false,
"ESP_BROWNOUT_DET_LVL_SEL_7": false,
"ESP_CONSOLE_NONE": false,
"ESP_CONSOLE_ROM_SERIAL_PORT_NUM": 0,
"ESP_CONSOLE_UART": true,
"ESP_CONSOLE_UART_BAUDRATE": 115200,
"ESP_CONSOLE_UART_CUSTOM": false,
"ESP_CONSOLE_UART_DEFAULT": true,
"ESP_CONSOLE_UART_NUM": 0,
"ESP_DEBUG_OCDAWARE": true,
"ESP_DEBUG_STUBS_ENABLE": false,
"ESP_DEFAULT_CPU_FREQ_MHZ": 160,
"ESP_DEFAULT_CPU_FREQ_MHZ_160": true,
"ESP_DEFAULT_CPU_FREQ_MHZ_240": false,
"ESP_DEFAULT_CPU_FREQ_MHZ_80": false,
"ESP_EFUSE_BLOCK_REV_MAX_FULL": 99,
"ESP_EFUSE_BLOCK_REV_MIN_FULL": 0,
"ESP_ERR_TO_NAME_LOOKUP": true,
"ESP_INT_WDT": true,
"ESP_INT_WDT_CHECK_CPU1": true,
"ESP_INT_WDT_TIMEOUT_MS": 300,
"ESP_IPC_ISR_ENABLE": true,
"ESP_IPC_TASK_STACK_SIZE": 1024,
"ESP_IPC_USES_CALLERS_PRIORITY": true,
"ESP_MAC_ADDR_UNIVERSE_BT": true,
"ESP_MAC_ADDR_UNIVERSE_ETH": true,
"ESP_MAC_ADDR_UNIVERSE_WIFI_AP": true,
"ESP_MAC_ADDR_UNIVERSE_WIFI_STA": true,
"ESP_MAC_IGNORE_MAC_CRC_ERROR": false,
"ESP_MAC_UNIVERSAL_MAC_ADDRESSES": 4,
"ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR": true,
"ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC": false,
"ESP_MAIN_TASK_AFFINITY": 0,
"ESP_MAIN_TASK_AFFINITY_CPU0": true,
"ESP_MAIN_TASK_AFFINITY_CPU1": false,
"ESP_MAIN_TASK_AFFINITY_NO_AFFINITY": false,
"ESP_MAIN_TASK_STACK_SIZE": 3584,
"ESP_MINIMAL_SHARED_STACK_SIZE": 2048,
"ESP_PANIC_HANDLER_IRAM": false,
"ESP_REV_MAX_FULL": 399,
"ESP_REV_MIN_FULL": 0,
"ESP_ROM_HAS_CRC_BE": true,
"ESP_ROM_HAS_CRC_LE": true,
"ESP_ROM_HAS_JPEG_DECODE": true,
"ESP_ROM_HAS_MZ_CRC32": true,
"ESP_ROM_HAS_NEWLIB": true,
"ESP_ROM_HAS_NEWLIB_32BIT_TIME": true,
"ESP_ROM_HAS_NEWLIB_NANO_FORMAT": true,
"ESP_ROM_HAS_OUTPUT_PUTC_FUNC": true,
"ESP_ROM_HAS_SW_FLOAT": true,
"ESP_ROM_HAS_UART_BUF_SWITCH": true,
"ESP_ROM_NEEDS_SWSETUP_WORKAROUND": true,
"ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB": true,
"ESP_ROM_USB_OTG_NUM": -1,
"ESP_ROM_USB_SERIAL_DEVICE_NUM": -1,
"ESP_SLEEP_CACHE_SAFE_ASSERTION": false,
"ESP_SLEEP_DEBUG": false,
"ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND": true,
"ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS": true,
"ESP_SLEEP_GPIO_RESET_WORKAROUND": false,
"ESP_SLEEP_MSPI_NEED_ALL_IO_PU": false,
"ESP_SLEEP_POWER_DOWN_FLASH": false,
"ESP_SLEEP_RTC_BUS_ISO_WORKAROUND": true,
"ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY": 2000,
"ESP_SYSTEM_BROWNOUT_INTR": true,
"ESP_SYSTEM_CHECK_INT_LEVEL_4": true,
"ESP_SYSTEM_CHECK_INT_LEVEL_5": false,
"ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM": false,
"ESP_SYSTEM_EVENT_QUEUE_SIZE": 32,
"ESP_SYSTEM_EVENT_TASK_STACK_SIZE": 2304,
"ESP_SYSTEM_PANIC_PRINT_HALT": false,
"ESP_SYSTEM_PANIC_PRINT_REBOOT": true,
"ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS": 0,
"ESP_SYSTEM_PANIC_SILENT_REBOOT": false,
"ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0": true,
"ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1": true,
"ESP_TASK_WDT_EN": true,
"ESP_TASK_WDT_INIT": true,
"ESP_TASK_WDT_PANIC": false,
"ESP_TASK_WDT_TIMEOUT_S": 5,
"FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER": true,
"FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE": false,
"FREERTOS_CHECK_STACKOVERFLOW_CANARY": true,
"FREERTOS_CHECK_STACKOVERFLOW_NONE": false,
"FREERTOS_CHECK_STACKOVERFLOW_PTRVAL": false,
"FREERTOS_CORETIMER_0": true,
"FREERTOS_CORETIMER_1": false,
"FREERTOS_DEBUG_OCDAWARE": true,
"FREERTOS_ENABLE_BACKWARD_COMPATIBILITY": false,
"FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP": false,
"FREERTOS_ENABLE_TASK_SNAPSHOT": true,
"FREERTOS_FPU_IN_ISR": false,
"FREERTOS_GENERATE_RUN_TIME_STATS": false,
"FREERTOS_HZ": 100,
"FREERTOS_IDLE_TASK_STACKSIZE": 1536,
"FREERTOS_INTERRUPT_BACKTRACE": true,
"FREERTOS_ISR_STACKSIZE": 1536,
"FREERTOS_MAX_TASK_NAME_LEN": 16,
"FREERTOS_NO_AFFINITY": 2147483647,
"FREERTOS_NUMBER_OF_CORES": 2,
"FREERTOS_PLACE_FUNCTIONS_INTO_FLASH": false,
"FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH": true,
"FREERTOS_PORT": true,
"FREERTOS_QUEUE_REGISTRY_SIZE": 0,
"FREERTOS_SMP": false,
"FREERTOS_SUPPORT_STATIC_ALLOCATION": true,
"FREERTOS_SYSTICK_USES_CCOUNT": true,
"FREERTOS_TASK_FUNCTION_WRAPPER": true,
"FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES": 1,
"FREERTOS_TASK_PRE_DELETION_HOOK": false,
"FREERTOS_THREAD_LOCAL_STORAGE_POINTERS": 1,
"FREERTOS_TICK_SUPPORT_CORETIMER": true,
"FREERTOS_TIMER_QUEUE_LENGTH": 10,
"FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY": 2147483647,
"FREERTOS_TIMER_SERVICE_TASK_NAME": "Tmr Svc",
"FREERTOS_TIMER_TASK_AFFINITY_CPU0": false,
"FREERTOS_TIMER_TASK_AFFINITY_CPU1": false,
"FREERTOS_TIMER_TASK_NO_AFFINITY": true,
"FREERTOS_TIMER_TASK_PRIORITY": 1,
"FREERTOS_TIMER_TASK_STACK_DEPTH": 2048,
"FREERTOS_TLSP_DELETION_CALLBACKS": true,
"FREERTOS_UNICORE": false,
"FREERTOS_USE_APPLICATION_TASK_TAG": false,
"FREERTOS_USE_IDLE_HOOK": false,
"FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES": false,
"FREERTOS_USE_TICK_HOOK": false,
"FREERTOS_USE_TIMERS": true,
"FREERTOS_USE_TRACE_FACILITY": false,
"FREERTOS_WATCHPOINT_END_OF_STACK": false,
"HAL_ASSERTION_DISABLE": false,
"HAL_ASSERTION_ENABLE": false,
"HAL_ASSERTION_EQUALS_SYSTEM": true,
"HAL_ASSERTION_SILENT": false,
"HAL_DEFAULT_ASSERTION_LEVEL": 2,
"IDF_CMAKE": true,
"IDF_EXPERIMENTAL_FEATURES": false,
"IDF_FIRMWARE_CHIP_ID": 0,
"IDF_INIT_VERSION": "5.4.1",
"IDF_TARGET": "esp32",
"IDF_TARGET_ARCH": "xtensa",
"IDF_TARGET_ARCH_XTENSA": true,
"IDF_TARGET_ESP32": true,
"IDF_TOOLCHAIN": "gcc",
"IDF_TOOLCHAIN_GCC": true,
"LOG_COLORS": false,
"LOG_DEFAULT_LEVEL": 3,
"LOG_DEFAULT_LEVEL_DEBUG": false,
"LOG_DEFAULT_LEVEL_ERROR": false,
"LOG_DEFAULT_LEVEL_INFO": true,
"LOG_DEFAULT_LEVEL_NONE": false,
"LOG_DEFAULT_LEVEL_VERBOSE": false,
"LOG_DEFAULT_LEVEL_WARN": false,
"LOG_DYNAMIC_LEVEL_CONTROL": true,
"LOG_MASTER_LEVEL": false,
"LOG_MAXIMUM_EQUALS_DEFAULT": true,
"LOG_MAXIMUM_LEVEL": 3,
"LOG_MAXIMUM_LEVEL_DEBUG": false,
"LOG_MAXIMUM_LEVEL_VERBOSE": false,
"LOG_TAG_LEVEL_CACHE_ARRAY": false,
"LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP": true,
"LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST": true,
"LOG_TAG_LEVEL_IMPL_CACHE_SIZE": 31,
"LOG_TAG_LEVEL_IMPL_LINKED_LIST": false,
"LOG_TAG_LEVEL_IMPL_NONE": false,
"LOG_TIMESTAMP_SOURCE_RTOS": true,
"LOG_TIMESTAMP_SOURCE_SYSTEM": false,
"MMU_PAGE_MODE": "64KB",
"MMU_PAGE_SIZE": 65536,
"MMU_PAGE_SIZE_64KB": true,
"NEWLIB_NANO_FORMAT": false,
"NEWLIB_STDIN_LINE_ENDING_CR": true,
"NEWLIB_STDIN_LINE_ENDING_CRLF": false,
"NEWLIB_STDIN_LINE_ENDING_LF": false,
"NEWLIB_STDOUT_LINE_ENDING_CR": false,
"NEWLIB_STDOUT_LINE_ENDING_CRLF": true,
"NEWLIB_STDOUT_LINE_ENDING_LF": false,
"NEWLIB_TIME_SYSCALL_USE_HRT": false,
"NEWLIB_TIME_SYSCALL_USE_NONE": false,
"NEWLIB_TIME_SYSCALL_USE_RTC": false,
"NEWLIB_TIME_SYSCALL_USE_RTC_HRT": true,
"PARTITION_TABLE_CUSTOM": false,
"PARTITION_TABLE_CUSTOM_FILENAME": "partitions.csv",
"PARTITION_TABLE_FILENAME": "partitions_singleapp.csv",
"PARTITION_TABLE_MD5": true,
"PARTITION_TABLE_OFFSET": 32768,
"PARTITION_TABLE_SINGLE_APP": true,
"PARTITION_TABLE_SINGLE_APP_LARGE": false,
"PARTITION_TABLE_TWO_OTA": false,
"PARTITION_TABLE_TWO_OTA_LARGE": false,
"PERIPH_CTRL_FUNC_IN_IRAM": true,
"RTC_CLK_CAL_CYCLES": 1024,
"RTC_CLK_SRC_EXT_CRYS": false,
"RTC_CLK_SRC_EXT_OSC": false,
"RTC_CLK_SRC_INT_8MD256": false,
"RTC_CLK_SRC_INT_RC": true,
"SECURE_BOOT": false,
"SECURE_BOOT_V1_SUPPORTED": true,
"SECURE_FLASH_ENC_ENABLED": false,
"SECURE_SIGNED_APPS_NO_SECURE_BOOT": false,
"SOC_ADC_ATTEN_NUM": 4,
"SOC_ADC_DIGI_CONTROLLER_NUM": 2,
"SOC_ADC_DIGI_DATA_BYTES_PER_CONV": 4,
"SOC_ADC_DIGI_MAX_BITWIDTH": 12,
"SOC_ADC_DIGI_MIN_BITWIDTH": 9,
"SOC_ADC_DIGI_MONITOR_NUM": 0,
"SOC_ADC_DIGI_RESULT_BYTES": 2,
"SOC_ADC_DIG_CTRL_SUPPORTED": true,
"SOC_ADC_DMA_SUPPORTED": true,
"SOC_ADC_MAX_CHANNEL_NUM": 10,
"SOC_ADC_PATT_LEN_MAX": 16,
"SOC_ADC_PERIPH_NUM": 2,
"SOC_ADC_RTC_CTRL_SUPPORTED": true,
"SOC_ADC_RTC_MAX_BITWIDTH": 12,
"SOC_ADC_RTC_MIN_BITWIDTH": 9,
"SOC_ADC_SAMPLE_FREQ_THRES_HIGH": 2,
"SOC_ADC_SAMPLE_FREQ_THRES_LOW": 20,
"SOC_ADC_SHARED_POWER": true,
"SOC_ADC_SUPPORTED": true,
"SOC_AES_SUPPORTED": true,
"SOC_AES_SUPPORT_AES_128": true,
"SOC_AES_SUPPORT_AES_192": true,
"SOC_AES_SUPPORT_AES_256": true,
"SOC_BLE_MESH_SUPPORTED": true,
"SOC_BLE_SUPPORTED": true,
"SOC_BLUFI_SUPPORTED": true,
"SOC_BOD_SUPPORTED": true,
"SOC_BROWNOUT_RESET_SUPPORTED": "Not determined",
"SOC_BT_CLASSIC_SUPPORTED": true,
"SOC_BT_H2C_ENC_KEY_CTRL_ENH_VSC_SUPPORTED": true,
"SOC_BT_SUPPORTED": true,
"SOC_CAPS_ECO_VER_MAX": 301,
"SOC_CCOMP_TIMER_SUPPORTED": true,
"SOC_CLK_APLL_SUPPORTED": true,
"SOC_CLK_RC_FAST_D256_SUPPORTED": true,
"SOC_CLK_RC_FAST_SUPPORT_CALIBRATION": true,
"SOC_CLK_TREE_SUPPORTED": true,
"SOC_CLK_XTAL32K_SUPPORTED": true,
"SOC_CONFIGURABLE_VDDSDIO_SUPPORTED": true,
"SOC_CPU_BREAKPOINTS_NUM": 2,
"SOC_CPU_CORES_NUM": 2,
"SOC_CPU_HAS_FPU": true,
"SOC_CPU_INTR_NUM": 32,
"SOC_CPU_WATCHPOINTS_NUM": 2,
"SOC_CPU_WATCHPOINT_MAX_REGION_SIZE": 64,
"SOC_DAC_CHAN_NUM": 2,
"SOC_DAC_DMA_16BIT_ALIGN": true,
"SOC_DAC_RESOLUTION": 8,
"SOC_DAC_SUPPORTED": true,
"SOC_DEEP_SLEEP_SUPPORTED": true,
"SOC_DPORT_WORKAROUND": "Not determined",
"SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL": 5,
"SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS": true,
"SOC_EFUSE_SUPPORTED": true,
"SOC_EMAC_RMII_CLK_OUT_INTERNAL_LOOPBACK": true,
"SOC_EMAC_SUPPORTED": true,
"SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX": 32,
"SOC_FLASH_ENC_SUPPORTED": true,
"SOC_GPIO_CLOCKOUT_BY_IO_MUX": true,
"SOC_GPIO_CLOCKOUT_CHANNEL_NUM": 3,
"SOC_GPIO_IN_RANGE_MAX": 39,
"SOC_GPIO_OUT_RANGE_MAX": 33,
"SOC_GPIO_PIN_COUNT": 40,
"SOC_GPIO_PORT": 1,
"SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP": true,
"SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK": 15667178,
"SOC_GPIO_VALID_GPIO_MASK": 1099511627775,
"SOC_GPSPI_SUPPORTED": true,
"SOC_GPTIMER_SUPPORTED": true,
"SOC_HP_CPU_HAS_MULTIPLE_CORES": true,
"SOC_HP_I2C_NUM": 2,
"SOC_I2C_CMD_REG_NUM": 16,
"SOC_I2C_FIFO_LEN": 32,
"SOC_I2C_NUM": 2,
"SOC_I2C_STOP_INDEPENDENT": true,
"SOC_I2C_SUPPORTED": true,
"SOC_I2C_SUPPORT_10BIT_ADDR": true,
"SOC_I2C_SUPPORT_APB": true,
"SOC_I2C_SUPPORT_SLAVE": true,
"SOC_I2S_HW_VERSION_1": true,
"SOC_I2S_LCD_I80_VARIANT": true,
"SOC_I2S_MAX_DATA_WIDTH": 24,
"SOC_I2S_NUM": 2,
"SOC_I2S_PDM_MAX_RX_LINES": 1,
"SOC_I2S_PDM_MAX_TX_LINES": 1,
"SOC_I2S_SUPPORTED": true,
"SOC_I2S_SUPPORTS_ADC": true,
"SOC_I2S_SUPPORTS_ADC_DAC": true,
"SOC_I2S_SUPPORTS_APLL": true,
"SOC_I2S_SUPPORTS_DAC": true,
"SOC_I2S_SUPPORTS_LCD_CAMERA": true,
"SOC_I2S_SUPPORTS_PDM": true,
"SOC_I2S_SUPPORTS_PDM_RX": true,
"SOC_I2S_SUPPORTS_PDM_TX": true,
"SOC_I2S_SUPPORTS_PLL_F160M": true,
"SOC_I2S_TRANS_SIZE_ALIGN_WORD": true,
"SOC_IDCACHE_PER_CORE": true,
"SOC_LCD_I80_BUSES": 2,
"SOC_LCD_I80_BUS_WIDTH": 24,
"SOC_LCD_I80_SUPPORTED": true,
"SOC_LEDC_CHANNEL_NUM": 8,
"SOC_LEDC_HAS_TIMER_SPECIFIC_MUX": true,
"SOC_LEDC_SUPPORTED": true,
"SOC_LEDC_SUPPORT_APB_CLOCK": true,
"SOC_LEDC_SUPPORT_HS_MODE": true,
"SOC_LEDC_SUPPORT_REF_TICK": true,
"SOC_LEDC_TIMER_BIT_WIDTH": 20,
"SOC_LEDC_TIMER_NUM": 4,
"SOC_LIGHT_SLEEP_SUPPORTED": true,
"SOC_LP_PERIPH_SHARE_INTERRUPT": true,
"SOC_LP_TIMER_BIT_WIDTH_HI": 16,
"SOC_LP_TIMER_BIT_WIDTH_LO": 32,
"SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER": 3,
"SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP": true,
"SOC_MCPWM_COMPARATORS_PER_OPERATOR": 2,
"SOC_MCPWM_GENERATORS_PER_OPERATOR": 2,
"SOC_MCPWM_GPIO_FAULTS_PER_GROUP": 3,
"SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP": 3,
"SOC_MCPWM_GROUPS": 2,
"SOC_MCPWM_OPERATORS_PER_GROUP": 3,
"SOC_MCPWM_SUPPORTED": true,
"SOC_MCPWM_TIMERS_PER_GROUP": 3,
"SOC_MCPWM_TRIGGERS_PER_OPERATOR": 2,
"SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED": true,
"SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED": true,
"SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED": true,
"SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED": true,
"SOC_MMU_LINEAR_ADDRESS_REGION_NUM": 3,
"SOC_MMU_PERIPH_NUM": 2,
"SOC_MPI_MEM_BLOCKS_NUM": 4,
"SOC_MPI_OPERATIONS_NUM": true,
"SOC_MPI_SUPPORTED": true,
"SOC_MPU_MIN_REGION_SIZE": 536870912,
"SOC_MPU_REGIONS_MAX_NUM": 8,
"SOC_MPU_SUPPORTED": true,
"SOC_PCNT_CHANNELS_PER_UNIT": 2,
"SOC_PCNT_GROUPS": 1,
"SOC_PCNT_SUPPORTED": true,
"SOC_PCNT_THRES_POINT_PER_UNIT": 2,
"SOC_PCNT_UNITS_PER_GROUP": 8,
"SOC_PHY_COMBO_MODULE": true,
"SOC_PHY_DIG_REGS_MEM_SIZE": 21,
"SOC_PHY_SUPPORTED": true,
"SOC_PM_MODEM_PD_BY_SW": true,
"SOC_PM_SUPPORTED": true,
"SOC_PM_SUPPORT_EXT0_WAKEUP": true,
"SOC_PM_SUPPORT_EXT1_WAKEUP": true,
"SOC_PM_SUPPORT_EXT_WAKEUP": true,
"SOC_PM_SUPPORT_MODEM_PD": true,
"SOC_PM_SUPPORT_RC_FAST_PD": true,
"SOC_PM_SUPPORT_RTC_FAST_MEM_PD": true,
"SOC_PM_SUPPORT_RTC_PERIPH_PD": true,
"SOC_PM_SUPPORT_RTC_SLOW_MEM_PD": true,
"SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP": true,
"SOC_PM_SUPPORT_VDDSDIO_PD": true,
"SOC_RMT_CHANNELS_PER_GROUP": 8,
"SOC_RMT_CHANNEL_CLK_INDEPENDENT": true,
"SOC_RMT_GROUPS": 1,
"SOC_RMT_MEM_WORDS_PER_CHANNEL": 64,
"SOC_RMT_RX_CANDIDATES_PER_GROUP": 8,
"SOC_RMT_SUPPORTED": true,
"SOC_RMT_SUPPORT_APB": true,
"SOC_RMT_SUPPORT_REF_TICK": true,
"SOC_RMT_TX_CANDIDATES_PER_GROUP": 8,
"SOC_RNG_SUPPORTED": true,
"SOC_RSA_MAX_BIT_LEN": 4096,
"SOC_RTCIO_HOLD_SUPPORTED": true,
"SOC_RTCIO_INPUT_OUTPUT_SUPPORTED": true,
"SOC_RTCIO_PIN_COUNT": 18,
"SOC_RTCIO_WAKE_SUPPORTED": true,
"SOC_RTC_FAST_MEM_SUPPORTED": true,
"SOC_RTC_MEM_SUPPORTED": true,
"SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256": true,
"SOC_RTC_SLOW_MEM_SUPPORTED": true,
"SOC_SDIO_SLAVE_SUPPORTED": true,
"SOC_SDMMC_HOST_SUPPORTED": true,
"SOC_SDMMC_NUM_SLOTS": 2,
"SOC_SDMMC_USE_IOMUX": true,
"SOC_SDM_CHANNELS_PER_GROUP": 8,
"SOC_SDM_CLK_SUPPORT_APB": true,
"SOC_SDM_GROUPS": 1,
"SOC_SDM_SUPPORTED": true,
"SOC_SECURE_BOOT_SUPPORTED": true,
"SOC_SECURE_BOOT_V1": true,
"SOC_SHARED_IDCACHE_SUPPORTED": true,
"SOC_SHA_ENDIANNESS_BE": true,
"SOC_SHA_SUPPORTED": true,
"SOC_SHA_SUPPORT_PARALLEL_ENG": true,
"SOC_SHA_SUPPORT_SHA1": true,
"SOC_SHA_SUPPORT_SHA256": true,
"SOC_SHA_SUPPORT_SHA384": true,
"SOC_SHA_SUPPORT_SHA512": true,
"SOC_SPIRAM_SUPPORTED": true,
"SOC_SPI_AS_CS_SUPPORTED": true,
"SOC_SPI_DMA_CHAN_NUM": 2,
"SOC_SPI_FLASH_SUPPORTED": true,
"SOC_SPI_HD_BOTH_INOUT_SUPPORTED": true,
"SOC_SPI_MAXIMUM_BUFFER_SIZE": 64,
"SOC_SPI_MAX_CS_NUM": 3,
"SOC_SPI_MAX_PRE_DIVIDER": 8192,
"SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE": true,
"SOC_SPI_PERIPH_NUM": 3,
"SOC_SPI_SUPPORT_CLK_APB": true,
"SOC_SUPPORT_COEXISTENCE": true,
"SOC_TIMER_GROUPS": 2,
"SOC_TIMER_GROUP_COUNTER_BIT_WIDTH": 64,
"SOC_TIMER_GROUP_SUPPORT_APB": true,
"SOC_TIMER_GROUP_TIMERS_PER_GROUP": 2,
"SOC_TIMER_GROUP_TOTAL_TIMERS": 4,
"SOC_TOUCH_SAMPLE_CFG_NUM": 1,
"SOC_TOUCH_SENSOR_NUM": 10,
"SOC_TOUCH_SENSOR_SUPPORTED": true,
"SOC_TOUCH_SENSOR_VERSION": 1,
"SOC_TWAI_BRP_DIV_SUPPORTED": "Not determined",
"SOC_TWAI_BRP_MIN": 2,
"SOC_TWAI_CLK_SUPPORT_APB": true,
"SOC_TWAI_CONTROLLER_NUM": 1,
"SOC_TWAI_SUPPORTED": true,
"SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT": true,
"SOC_UART_BITRATE_MAX": 5000000,
"SOC_UART_FIFO_LEN": 128,
"SOC_UART_HP_NUM": 3,
"SOC_UART_NUM": 3,
"SOC_UART_SUPPORTED": true,
"SOC_UART_SUPPORT_APB_CLK": true,
"SOC_UART_SUPPORT_REF_TICK": true,
"SOC_ULP_FSM_SUPPORTED": true,
"SOC_ULP_HAS_ADC": true,
"SOC_ULP_SUPPORTED": true,
"SOC_WDT_SUPPORTED": true,
"SOC_WIFI_CSI_SUPPORT": true,
"SOC_WIFI_MESH_SUPPORT": true,
"SOC_WIFI_NAN_SUPPORT": true,
"SOC_WIFI_SUPPORTED": true,
"SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW": true,
"SOC_WIFI_WAPI_SUPPORT": true,
"SOC_XTAL_SUPPORT_26M": true,
"SOC_XTAL_SUPPORT_40M": true,
"SOC_XTAL_SUPPORT_AUTO_DETECT": true,
"SPI_FLASH_BROWNOUT_RESET": true,
"SPI_FLASH_BROWNOUT_RESET_XMC": true,
"SPI_FLASH_BYPASS_BLOCK_ERASE": false,
"SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED": false,
"SPI_FLASH_DANGEROUS_WRITE_ABORTS": true,
"SPI_FLASH_DANGEROUS_WRITE_ALLOWED": false,
"SPI_FLASH_DANGEROUS_WRITE_FAILS": false,
"SPI_FLASH_ENABLE_COUNTERS": false,
"SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE": true,
"SPI_FLASH_ERASE_YIELD_DURATION_MS": 20,
"SPI_FLASH_ERASE_YIELD_TICKS": 1,
"SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND": false,
"SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST": false,
"SPI_FLASH_ROM_DRIVER_PATCH": true,
"SPI_FLASH_SHARE_SPI1_BUS": false,
"SPI_FLASH_SIZE_OVERRIDE": false,
"SPI_FLASH_SUPPORT_BOYA_CHIP": false,
"SPI_FLASH_SUPPORT_GD_CHIP": true,
"SPI_FLASH_SUPPORT_ISSI_CHIP": true,
"SPI_FLASH_SUPPORT_MXIC_CHIP": true,
"SPI_FLASH_SUPPORT_TH_CHIP": false,
"SPI_FLASH_SUPPORT_WINBOND_CHIP": true,
"SPI_FLASH_SUSPEND_TSUS_VAL_US": 50,
"SPI_FLASH_VENDOR_GD_SUPPORTED": true,
"SPI_FLASH_VENDOR_ISSI_SUPPORTED": true,
"SPI_FLASH_VENDOR_MXIC_SUPPORTED": true,
"SPI_FLASH_VENDOR_WINBOND_SUPPORTED": true,
"SPI_FLASH_VENDOR_XMC_SUPPORTED": true,
"SPI_FLASH_VERIFY_WRITE": false,
"SPI_FLASH_WRITE_CHUNK_SIZE": 8192,
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