mirror of
https://github.com/alexandrebobkov/ESP-Nodes.git
synced 2025-10-25 03:52:36 +00:00
ESP32 Bootstraps
This commit is contained in:
BIN
ESP32-Bootstraps/esp-idf/esp32-multitask/build/.ninja_deps
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ESP32-Bootstraps/esp-idf/esp32-multitask/build/.ninja_deps
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93 174 1760318302971992906 esp-idf/esp_system/ld/memory.ld 618b85739dbaa483
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93 199 1760318302993173948 esp-idf/esp_system/ld/sections.ld.in 2e1d2cf367d4027c
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93 199 1760318302993173948 /home/abobkov/MyProjects/ESP-Nodes/ESP32-Bootstraps/esp-idf/esp32-multitask/build/esp-idf/esp_system/ld/sections.ld.in 2e1d2cf367d4027c
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File diff suppressed because one or more lines are too long
@@ -871,7 +871,7 @@
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},
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{
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"directory": "/home/abobkov/MyProjects/ESP-Nodes/ESP32-Bootstraps/esp-idf/esp32-multitask/build",
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"command": "/home/abobkov/.espressif/tools/xtensa-esp-elf/esp-14.2.0_20241119/xtensa-esp-elf/bin/xtensa-esp32-elf-gcc -DESP_PLATFORM -DIDF_VER=\\\"v5.4.1-dirty\\\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DSOC_XTAL_FREQ_MHZ=CONFIG_XTAL_FREQ -D_GLIBCXX_HAVE_POSIX_SEMAPHORE -D_GLIBCXX_USE_POSIX_SEMAPHORE -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -D PROJECT_NAME=\\\"esp32-multitask\\\" -DPROJECT_VER=\\\"ESP32-Node_Switch-v2.7-10275-g2\\\" -I/home/abobkov/MyProjects/ESP-Nodes/ESP32-Bootstraps/esp-idf/esp32-multitask/build/config -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_app_format/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/newlib/platform_include -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/config/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/config/include/freertos -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/config/xtensa/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/FreeRTOS-Kernel/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/include/freertos -I/home/abobkov/esp/v5.4.1/esp-idf/components/freertos/esp_additions/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/include/soc -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/include/soc/esp32 -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/dma/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/ldo/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/debug_probe/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/port/esp32/. -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_hw_support/port/esp32/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/heap/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/heap/tlsf -I/home/abobkov/esp/v5.4.1/esp-idf/components/log/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/soc/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/soc/esp32 -I/home/abobkov/esp/v5.4.1/esp-idf/components/soc/esp32/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/soc/esp32/register -I/home/abobkov/esp/v5.4.1/esp-idf/components/hal/platform_port/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/hal/esp32/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/hal/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_rom/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_rom/esp32/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_rom/esp32/include/esp32 -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_rom/esp32 -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_common/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_system/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_system/port/soc -I/home/abobkov/esp/v5.4.1/esp-idf/components/esp_system/port/include/private -I/home/abobkov/esp/v5.4.1/esp-idf/components/xtensa/esp32/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/xtensa/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/xtensa/deprecated_include -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/include/apps -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/include/apps/sntp -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/lwip/src/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/port/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/port/freertos/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/port/esp32xx/include -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/port/esp32xx/include/arch -I/home/abobkov/esp/v5.4.1/esp-idf/components/lwip/port/esp32xx/include/sys -mlongcalls -Wno-frame-address -fno-builtin-memcpy -fno-builtin-memset -fno-builtin-bzero -fno-builtin-stpcpy -fno-builtin-strncpy -fdiagnostics-color=always -ffunction-sections -fdata-sections -Wall -Werror=all -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wextra -Wno-error=extra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -Og -fno-shrink-wrap -fmacro-prefix-map=/home/abobkov/MyProjects/ESP-Nodes/ESP32-Bootstraps/esp-idf/esp32-multitask=. -fmacro-prefix-map=/home/abobkov/esp/v5.4.1/esp-idf=/IDF -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -std=gnu17 -Wno-old-style-declaration -o esp-idf/esp_app_format/CMakeFiles/__idf_esp_app_format.dir/esp_app_desc.c.obj -c /home/abobkov/esp/v5.4.1/esp-idf/components/esp_app_format/esp_app_desc.c",
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"file": "/home/abobkov/esp/v5.4.1/esp-idf/components/esp_app_format/esp_app_desc.c",
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@@ -0,0 +1,118 @@
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/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ESP32 Linker Script Memory Layout
|
||||
|
||||
This file describes the memory layout (memory blocks) as virtual
|
||||
memory addresses.
|
||||
|
||||
esp32.project.ld contains output sections to link compiler output
|
||||
into these memory blocks.
|
||||
|
||||
***
|
||||
|
||||
This linker script is passed through the C preprocessor to include
|
||||
configuration options.
|
||||
|
||||
Please use preprocessor features sparingly! Restrict
|
||||
to simple macros with numeric values, and/or #if/#endif blocks.
|
||||
*/
|
||||
/*
|
||||
* Automatically generated file. DO NOT EDIT.
|
||||
* Espressif IoT Development Framework (ESP-IDF) 5.4.1 Configuration Header
|
||||
*/
|
||||
|
||||
/* List of deprecated options */
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* CPU instruction prefetch padding size for flash mmap scenario */
|
||||
/*
|
||||
* PMP region granularity size
|
||||
* Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
|
||||
* to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
|
||||
* the PMP granularity is 2^G+2 bytes.
|
||||
*/
|
||||
/* CPU instruction prefetch padding size for memory protection scenario */
|
||||
/* Memory alignment size for PMS */
|
||||
/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
|
||||
/* If BT is not built at all */
|
||||
MEMORY
|
||||
{
|
||||
/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
|
||||
of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
|
||||
are connected to the data port of the CPU and eg allow bytewise access. */
|
||||
/* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
|
||||
iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + 0x0
|
||||
/* Even though the segment name is iram, it is actually mapped to flash
|
||||
*/
|
||||
iram0_2_seg (RX) : org = 0x400D0020, len = 0x330000-0x20
|
||||
/*
|
||||
(0x20 offset above is a convenience for the app binary image generation.
|
||||
Flash cache has 64KB pages. The .bin file which is flashed to the chip
|
||||
has a 0x18 byte file header, and each segment has a 0x08 byte segment
|
||||
header. Setting this offset makes it simple to meet the flash cache MMU's
|
||||
constraint that (paddr % 64KB == vaddr % 64KB).)
|
||||
*/
|
||||
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
|
||||
|
||||
Enabling Bluetooth & Trace Memory features in menuconfig will decrease
|
||||
the amount of RAM available.
|
||||
|
||||
Note: Length of this section *should* be 0x50000, and this extra DRAM is available
|
||||
in heap at runtime. However due to static ROM memory usage at this 176KB mark, the
|
||||
additional static memory temporarily cannot be used.
|
||||
*/
|
||||
dram0_0_seg (RW) : org = 0x3FFB0000 + 0,
|
||||
len = 0x2c200 - 0
|
||||
/* Flash mapped constant data */
|
||||
drom0_0_seg (R) : org = 0x3F400020, len = 0x400000-0x20
|
||||
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
|
||||
/* RTC fast memory (executable). Persists over deep sleep. */
|
||||
rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 - 0
|
||||
/* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */
|
||||
rtc_data_seg(RW) : org = 0x3ff80000, len = 0x2000 - 0
|
||||
/* We reduced the size of rtc_iram_seg and rtc_data_seg by ESP_BOOTLOADER_RESERVE_RTC value.
|
||||
It reserves the amount of RTC fast memory that we use for this memory segment.
|
||||
This segment is intended for keeping bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
org = 0x3ff80000 + 0x2000 - ESP_BOOTLOADER_RESERVE_RTC == SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t)
|
||||
*/
|
||||
rtc_fast_reserved_seg(RW) : org = 0x3ff80000 + 0x2000 - 0, len = 0
|
||||
/* RTC slow memory (data accessible). Persists over deep sleep.
|
||||
|
||||
Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
|
||||
*/
|
||||
rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000 - ((24))
|
||||
/* We reduced the size of rtc_slow_seg by RESERVE_RTC_MEM value.
|
||||
It reserves the amount of RTC slow memory that we use for this memory segment.
|
||||
This segment is intended for keeping rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM
|
||||
*/
|
||||
rtc_slow_reserved_seg(RW) : org = 0x50000000 + 0x2000 - ((24)), len = ((24))
|
||||
/* external memory */
|
||||
extern_ram_seg(RWX) : org = 0x3F800000,
|
||||
len = 0x400000
|
||||
}
|
||||
_heap_start = _heap_low_start;
|
||||
_sram1_iram_start = 0x400A0000;
|
||||
_sram1_iram_len = ( _iram_end > _sram1_iram_start) ? (_iram_end - _sram1_iram_start) : 0;
|
||||
_heap_end = ALIGN(0x40000000 - _sram1_iram_len - 3, 4);
|
||||
_data_seg_org = ORIGIN(rtc_data_seg);
|
||||
/* The lines below define location alias for .rtc.data section based on Kconfig option.
|
||||
When the option is not defined then use slow memory segment
|
||||
else the data will be placed in fast memory segment */
|
||||
REGION_ALIAS("rtc_data_location", rtc_slow_seg );
|
||||
REGION_ALIAS("default_code_seg", iram0_2_seg);
|
||||
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
|
||||
/**
|
||||
* If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
|
||||
* also be first in the segment.
|
||||
*/
|
||||
ASSERT(_rodata_start == ORIGIN(default_rodata_seg),
|
||||
".flash.appdesc section must be placed at the beginning of the rodata segment.")
|
||||
@@ -0,0 +1,525 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/*
|
||||
* Automatically generated file. DO NOT EDIT.
|
||||
* Espressif IoT Development Framework (ESP-IDF) 5.4.1 Configuration Header
|
||||
*/
|
||||
|
||||
/* List of deprecated options */
|
||||
/* CPU instruction prefetch padding size for flash mmap scenario */
|
||||
/*
|
||||
* PMP region granularity size
|
||||
* Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
|
||||
* to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
|
||||
* the PMP granularity is 2^G+2 bytes.
|
||||
*/
|
||||
/* CPU instruction prefetch padding size for memory protection scenario */
|
||||
/* Memory alignment size for PMS */
|
||||
/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_text_start = ABSOLUTE(.);
|
||||
mapping[rtc_text]
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
/**
|
||||
* This section is required to skip rtc.text area because rtc_iram_seg and
|
||||
* rtc_data_seg are reflect the same address space on different buses.
|
||||
*/
|
||||
.rtc.dummy :
|
||||
{
|
||||
_rtc_dummy_start = ABSOLUTE(.);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
. = SIZEOF(.rtc.text);
|
||||
_rtc_dummy_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_force_fast_start = ABSOLUTE(.);
|
||||
mapping[rtc_force_fast]
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_force_fast_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
mapping[rtc_data]
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
mapping[rtc_bss]
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_noinit_start = ABSOLUTE(.);
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_noinit_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_force_slow_start = ABSOLUTE(.);
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_force_slow_end = ABSOLUTE(.);
|
||||
} > rtc_slow_seg
|
||||
/**
|
||||
* This section holds RTC FAST data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_fast_reserved (NOLOAD):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_fast_reserved_start = ABSOLUTE(.);
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
||||
_rtc_fast_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_fast_reserved_seg
|
||||
_rtc_fast_reserved_length = _rtc_fast_reserved_end - _rtc_fast_reserved_start;
|
||||
ASSERT((_rtc_fast_reserved_length <= LENGTH(rtc_fast_reserved_seg)),
|
||||
"RTC FAST reserved segment data does not fit.")
|
||||
/**
|
||||
* This section holds RTC SLOW data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_slow_reserved (NOLOAD):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_rtc_slow_reserved_start = ABSOLUTE(.);
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
||||
_rtc_slow_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_slow_reserved_seg
|
||||
_rtc_slow_reserved_length = _rtc_slow_reserved_end - _rtc_slow_reserved_start;
|
||||
_rtc_reserved_length = _rtc_slow_reserved_length;
|
||||
ASSERT((_rtc_slow_reserved_length <= LENGTH(rtc_slow_reserved_seg)),
|
||||
"RTC SLOW reserved segment data does not fit.")
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
/* Send .iram0 code to iram */
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to IRAM */
|
||||
_vector_table = ABSOLUTE(.);
|
||||
. = 0x0;
|
||||
KEEP(*(.WindowVectors.text));
|
||||
. = 0x180;
|
||||
KEEP(*(.Level2InterruptVector.text));
|
||||
. = 0x1c0;
|
||||
KEEP(*(.Level3InterruptVector.text));
|
||||
. = 0x200;
|
||||
KEEP(*(.Level4InterruptVector.text));
|
||||
. = 0x240;
|
||||
KEEP(*(.Level5InterruptVector.text));
|
||||
. = 0x280;
|
||||
KEEP(*(.DebugExceptionVector.text));
|
||||
. = 0x2c0;
|
||||
KEEP(*(.NMIExceptionVector.text));
|
||||
. = 0x300;
|
||||
KEEP(*(.KernelExceptionVector.text));
|
||||
. = 0x340;
|
||||
KEEP(*(.UserExceptionVector.text));
|
||||
. = 0x3C0;
|
||||
KEEP(*(.DoubleExceptionVector.text));
|
||||
. = 0x400;
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
*(.*Vector.literal)
|
||||
*(.UserEnter.literal);
|
||||
*(.UserEnter.text);
|
||||
. = ALIGN (16);
|
||||
*(.entry.literal)
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
_init_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
.iram0.text :
|
||||
{
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
mapping[iram0_text]
|
||||
} > iram0_0_seg
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
mapping[dram0_data]
|
||||
_data_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
/**
|
||||
* This section holds data that won't be initialised when startup.
|
||||
* This section locates in External RAM region.
|
||||
*/
|
||||
.ext_ram_noinit (NOLOAD) :
|
||||
{
|
||||
_ext_ram_noinit_start = ABSOLUTE(.);
|
||||
*(.ext_ram_noinit*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ext_ram_noinit_end = ABSOLUTE(.);
|
||||
} > extern_ram_seg
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_noinit_start = ABSOLUTE(.);
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_noinit_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
/* External Memory BSS. (Variables with EXT_RAM_BSS_ATTR attribute). */
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_ext_ram_bss_start = ABSOLUTE(.);
|
||||
mapping[extern_ram]
|
||||
|
||||
. = ALIGN(4);
|
||||
_ext_ram_bss_end = ABSOLUTE(.);
|
||||
} > extern_ram_seg
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
/**
|
||||
* ldgen places all bss-related data to mapping[dram0_bss]
|
||||
* (See components/esp_system/app.lf).
|
||||
*/
|
||||
mapping[dram0_bss]
|
||||
|
||||
. = ALIGN(8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
/**
|
||||
* Mark flash.rodata start.
|
||||
* This can be used for mmu driver to maintain virtual address
|
||||
*/
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
/* !DO NOT PUT ANYTHING BEFORE THIS! */
|
||||
/* Should be the first. App version info. */
|
||||
*(.rodata_desc .rodata_desc.*)
|
||||
/* Should be the second. Custom app version info. */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*)
|
||||
/**
|
||||
* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image.
|
||||
*/
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} > default_rodata_seg
|
||||
ASSERT((ADDR(.flash.rodata) == ADDR(.flash.appdesc) + SIZEOF(.flash.appdesc)), "The gap between .flash.appdesc and .flash.rodata must not exist to produce the final bin image.")
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
mapping[flash_rodata]
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
/* C++ exception handlers table. */
|
||||
|
||||
. = ALIGN(4);
|
||||
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
/**
|
||||
* C++ constructor tables.
|
||||
*
|
||||
* Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
|
||||
*/
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
|
||||
. = ALIGN(4);
|
||||
soc_reserved_memory_region_start = ABSOLUTE(.);
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
/* System init functions registered via ESP_SYSTEM_INIT_FN */
|
||||
|
||||
. = ALIGN(4);
|
||||
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
/* TLS data. */
|
||||
|
||||
. = ALIGN(4);
|
||||
_thread_local_start = ABSOLUTE(.);
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
/**
|
||||
* This section contains all the rodata that is not used
|
||||
* at runtime, helping to avoid an increase in binary size.
|
||||
*/
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
/**
|
||||
* This symbol marks the end of flash.rodata. It can be utilized by the MMU
|
||||
* driver to maintain the virtual address.
|
||||
* NOLOAD rodata may not be included in this section.
|
||||
*/
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
mapping[rodata_noload]
|
||||
} > default_rodata_seg
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
/**
|
||||
* Mark the start of flash.text.
|
||||
* This can be used by the MMU driver to maintain the virtual address.
|
||||
*/
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
mapping[flash_text]
|
||||
*(.stub)
|
||||
*(.gnu.warning)
|
||||
*(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
/**
|
||||
* CPU will try to prefetch up to 16 bytes of of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction,
|
||||
* add dummy bytes to ensure this.
|
||||
*/
|
||||
. += 16;
|
||||
_text_end = ABSOLUTE(.);
|
||||
/**
|
||||
* Mark the flash.text end.
|
||||
* This can be used for MMU driver to maintain virtual address.
|
||||
*/
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
.iram0.data :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_iram_data_start = ABSOLUTE(.);
|
||||
mapping[iram0_data]
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_iram_bss_start = ABSOLUTE(.);
|
||||
mapping[iram0_bss]
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(4);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
/* Lowest possible start address for the heap */
|
||||
|
||||
. = ALIGN(8);
|
||||
_heap_low_start = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
/* DWARF 3 */
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* GNU DWARF 2 extensions */
|
||||
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
|
||||
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
|
||||
/* DWARF 4 */
|
||||
.debug_types 0 : { *(.debug_types) }
|
||||
/* DWARF 5 */
|
||||
.debug_addr 0 : { *(.debug_addr) }
|
||||
.debug_line_str 0 : { *(.debug_line_str) }
|
||||
.debug_loclists 0 : { *(.debug_loclists) }
|
||||
.debug_macro 0 : { *(.debug_macro) }
|
||||
.debug_names 0 : { *(.debug_names) }
|
||||
.debug_rnglists 0 : { *(.debug_rnglists) }
|
||||
.debug_str_offsets 0 : { *(.debug_str_offsets) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.note.GNU-stack 0: { *(.note.GNU-stack) }
|
||||
/**
|
||||
* .xt.prop and .xt.lit sections will be used by the debugger and disassembler
|
||||
* to get more information about raw data present in the code.
|
||||
* Indeed, it may be required to add some padding at some points in the code
|
||||
* in order to align a branch/jump destination on a particular bound.
|
||||
* Padding these instructions will generate null bytes that shall be
|
||||
* interpreted as data, and not code by the debugger or disassembler.
|
||||
* This section will only be present in the ELF file, not in the final binary
|
||||
* For more details, check GCC-212
|
||||
*/
|
||||
.xtensa.info 0: { *(.xtensa.info) }
|
||||
.xt.prop 0 : { *(.xt.prop .xt.prop.* .gnu.linkonce.prop.*) }
|
||||
.xt.lit 0 : { *(.xt.lit .xt.lit.* .gnu.linkonce.p.*) }
|
||||
/DISCARD/ :
|
||||
{
|
||||
*(.fini)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
}
|
||||
}
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
ASSERT(((_heap_low_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -1,7 +1,7 @@
|
||||
{
|
||||
"version": "1.2",
|
||||
"project_name": "esp32-multitask",
|
||||
"project_version": "ESP32-Node_Switch-v2.7-10271-g5e40f99df-dirty",
|
||||
"project_version": "ESP32-Node_Switch-v2.7-10275-g27d655490-dirty",
|
||||
"project_path": "/home/abobkov/MyProjects/ESP-Nodes/ESP32-Bootstraps/esp-idf/esp32-multitask",
|
||||
"idf_path": "/home/abobkov/esp/v5.4.1/esp-idf",
|
||||
"build_dir": "/home/abobkov/MyProjects/ESP-Nodes/ESP32-Bootstraps/esp-idf/esp32-multitask/build",
|
||||
|
||||
Reference in New Issue
Block a user