mirror of
https://github.com/alexandrebobkov/ESP-Nodes.git
synced 2025-08-08 09:50:52 +00:00
130 lines
5.1 KiB
JavaScript
130 lines
5.1 KiB
JavaScript
import { ESP32C6ROM } from "./esp32c6";
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export class ESP32C5ROM extends ESP32C6ROM {
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constructor() {
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super(...arguments);
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this.CHIP_NAME = "ESP32-C5";
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this.IMAGE_CHIP_ID = 23;
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this.BOOTLOADER_FLASH_OFFSET = 0x2000;
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this.EFUSE_BASE = 0x600b4800;
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this.EFUSE_BLOCK1_ADDR = this.EFUSE_BASE + 0x044;
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this.MAC_EFUSE_REG = this.EFUSE_BASE + 0x044;
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this.UART_CLKDIV_REG = 0x60000014;
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this.EFUSE_RD_REG_BASE = this.EFUSE_BASE + 0x030; // BLOCK0 read base address
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this.EFUSE_PURPOSE_KEY0_REG = this.EFUSE_BASE + 0x34;
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this.EFUSE_PURPOSE_KEY0_SHIFT = 24;
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this.EFUSE_PURPOSE_KEY1_REG = this.EFUSE_BASE + 0x34;
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this.EFUSE_PURPOSE_KEY1_SHIFT = 28;
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this.EFUSE_PURPOSE_KEY2_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY2_SHIFT = 0;
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this.EFUSE_PURPOSE_KEY3_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY3_SHIFT = 4;
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this.EFUSE_PURPOSE_KEY4_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY4_SHIFT = 8;
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this.EFUSE_PURPOSE_KEY5_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY5_SHIFT = 12;
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this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = this.EFUSE_RD_REG_BASE;
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this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20;
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this.EFUSE_SPI_BOOT_CRYPT_CNT_REG = this.EFUSE_BASE + 0x034;
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this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18;
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this.EFUSE_SECURE_BOOT_EN_REG = this.EFUSE_BASE + 0x038;
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this.EFUSE_SECURE_BOOT_EN_MASK = 1 << 20;
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this.IROM_MAP_START = 0x42000000;
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this.IROM_MAP_END = 0x42800000;
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this.DROM_MAP_START = 0x42800000;
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this.DROM_MAP_END = 0x43000000;
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this.PCR_SYSCLK_CONF_REG = 0x60096110;
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this.PCR_SYSCLK_XTAL_FREQ_V = 0x7f << 24;
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this.PCR_SYSCLK_XTAL_FREQ_S = 24;
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this.XTAL_CLK_DIVIDER = 1;
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this.UARTDEV_BUF_NO = 0x4085f51c; // Variable in ROM .bss which indicates the port in use
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// Magic value for ESP32C5
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this.CHIP_DETECT_MAGIC_VALUE = [0x1101406f, 0x63e1406f, 0x5fd1406f];
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this.FLASH_FREQUENCY = {
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"80m": 0xf,
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"40m": 0x0,
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"20m": 0x2,
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};
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this.MEMORY_MAP = [
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[0x00000000, 0x00010000, "PADDING"],
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[0x42800000, 0x43000000, "DROM"],
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[0x40800000, 0x40860000, "DRAM"],
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[0x40800000, 0x40860000, "BYTE_ACCESSIBLE"],
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[0x4003a000, 0x40040000, "DROM_MASK"],
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[0x40000000, 0x4003a000, "IROM_MASK"],
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[0x42000000, 0x42800000, "IROM"],
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[0x40800000, 0x40860000, "IRAM"],
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[0x50000000, 0x50004000, "RTC_IRAM"],
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[0x50000000, 0x50004000, "RTC_DRAM"],
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[0x600fe000, 0x60100000, "MEM_INTERNAL2"],
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];
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this.UF2_FAMILY_ID = 0xf71c0343;
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this.EFUSE_MAX_KEY = 5;
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this.KEY_PURPOSES = {
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0: "USER/EMPTY",
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1: "ECDSA_KEY",
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2: "XTS_AES_256_KEY_1",
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3: "XTS_AES_256_KEY_2",
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4: "XTS_AES_128_KEY",
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5: "HMAC_DOWN_ALL",
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6: "HMAC_DOWN_JTAG",
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7: "HMAC_DOWN_DIGITAL_SIGNATURE",
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8: "HMAC_UP",
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9: "SECURE_BOOT_DIGEST0",
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10: "SECURE_BOOT_DIGEST1",
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11: "SECURE_BOOT_DIGEST2",
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12: "KM_INIT_KEY",
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};
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}
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async getPkgVersion(loader) {
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const numWord = 2;
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return ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * numWord)) >> 26) & 0x07;
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}
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async getMinorChipVersion(loader) {
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const numWord = 2;
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return ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * numWord)) >> 0) & 0x0f;
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}
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async getMajorChipVersion(loader) {
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const numWord = 2;
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return ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * numWord)) >> 4) & 0x03;
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}
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async getChipDescription(loader) {
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const pkgVer = await this.getPkgVersion(loader);
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let desc;
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if (pkgVer === 0) {
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desc = "ESP32-C5";
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}
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else {
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desc = "unknown ESP32-C5";
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}
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const majorRev = await this.getMajorChipVersion(loader);
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const minorRev = await this.getMinorChipVersion(loader);
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return `${desc} (revision v${majorRev}.${minorRev})`;
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}
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async getChipFeatures(loader) {
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return ["Wi-Fi 6 (dual-band)", "BT 5 (LE)"];
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}
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async getCrystalFreq(loader) {
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// The crystal detection algorithm of ESP32/ESP8266
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// works for ESP32-C5 as well.
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const uartDiv = (await loader.readReg(this.UART_CLKDIV_REG)) & this.UART_CLKDIV_MASK;
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const etsXtal = (loader.transport.baudrate * uartDiv) / 1000000 / this.XTAL_CLK_DIVIDER;
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let normXtal;
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if (etsXtal > 45) {
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normXtal = 48;
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}
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else if (etsXtal > 33) {
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normXtal = 40;
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}
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else {
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normXtal = 26;
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}
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if (Math.abs(normXtal - etsXtal) > 1) {
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loader.info("WARNING: Unsupported crystal in use");
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}
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return normXtal;
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}
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async getCrystalFreqRomExpect(loader) {
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return (((await loader.readReg(this.PCR_SYSCLK_CONF_REG)) & this.PCR_SYSCLK_XTAL_FREQ_V) >> this.PCR_SYSCLK_XTAL_FREQ_S);
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}
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}
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