mirror of
https://github.com/alexandrebobkov/ESP-Nodes.git
synced 2025-08-08 03:42:24 +00:00
240 lines
9.6 KiB
JavaScript
240 lines
9.6 KiB
JavaScript
import { ROM } from "./rom.js";
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export class ESP32S2ROM extends ROM {
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constructor() {
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super(...arguments);
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this.CHIP_NAME = "ESP32-S2";
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this.IMAGE_CHIP_ID = 2;
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this.IROM_MAP_START = 0x40080000;
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this.IROM_MAP_END = 0x40b80000;
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this.DROM_MAP_START = 0x3f000000;
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this.DROM_MAP_END = 0x3f3f0000;
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this.CHIP_DETECT_MAGIC_VALUE = [0x000007c6];
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this.SPI_REG_BASE = 0x3f402000;
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this.SPI_USR_OFFS = 0x18;
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this.SPI_USR1_OFFS = 0x1c;
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this.SPI_USR2_OFFS = 0x20;
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this.SPI_MOSI_DLEN_OFFS = 0x24;
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this.SPI_MISO_DLEN_OFFS = 0x28;
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this.SPI_W0_OFFS = 0x58;
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this.SPI_ADDR_REG_MSB = false;
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this.MAC_EFUSE_REG = 0x3f41a044; // ESP32-S2 has special block for MAC efuses
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this.UART_CLKDIV_REG = 0x3f400014;
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this.SUPPORTS_ENCRYPTED_FLASH = true;
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this.FLASH_ENCRYPTED_WRITE_ALIGN = 16;
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// todo: use espefuse APIs to get this info
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this.EFUSE_BASE = 0x3f41a000;
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this.EFUSE_RD_REG_BASE = this.EFUSE_BASE + 0x030; // BLOCK0 read base address
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this.EFUSE_BLOCK1_ADDR = this.EFUSE_BASE + 0x044;
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this.EFUSE_BLOCK2_ADDR = this.EFUSE_BASE + 0x05c;
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this.EFUSE_PURPOSE_KEY0_REG = this.EFUSE_BASE + 0x34;
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this.EFUSE_PURPOSE_KEY0_SHIFT = 24;
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this.EFUSE_PURPOSE_KEY1_REG = this.EFUSE_BASE + 0x34;
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this.EFUSE_PURPOSE_KEY1_SHIFT = 28;
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this.EFUSE_PURPOSE_KEY2_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY2_SHIFT = 0;
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this.EFUSE_PURPOSE_KEY3_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY3_SHIFT = 4;
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this.EFUSE_PURPOSE_KEY4_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY4_SHIFT = 8;
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this.EFUSE_PURPOSE_KEY5_REG = this.EFUSE_BASE + 0x38;
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this.EFUSE_PURPOSE_KEY5_SHIFT = 12;
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this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = this.EFUSE_RD_REG_BASE;
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this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 19;
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this.EFUSE_SPI_BOOT_CRYPT_CNT_REG = this.EFUSE_BASE + 0x034;
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this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18;
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this.EFUSE_SECURE_BOOT_EN_REG = this.EFUSE_BASE + 0x038;
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this.EFUSE_SECURE_BOOT_EN_MASK = 1 << 20;
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this.EFUSE_RD_REPEAT_DATA3_REG = this.EFUSE_BASE + 0x3c;
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this.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK = 1 << 9;
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this.PURPOSE_VAL_XTS_AES256_KEY_1 = 2;
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this.PURPOSE_VAL_XTS_AES256_KEY_2 = 3;
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this.PURPOSE_VAL_XTS_AES128_KEY = 4;
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this.UARTDEV_BUF_NO = 0x3ffffd14; // Variable in ROM .bss which indicates the port in use
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this.UARTDEV_BUF_NO_USB_OTG = 2; // Value of the above indicating that USB-OTG is in use
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this.USB_RAM_BLOCK = 0x800; // Max block size USB-OTG is used
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this.GPIO_STRAP_REG = 0x3f404038;
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this.GPIO_STRAP_SPI_BOOT_MASK = 1 << 3; // Not download mode
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this.GPIO_STRAP_VDDSPI_MASK = 1 << 4;
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this.RTC_CNTL_OPTION1_REG = 0x3f408128;
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this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK = 0x1; // Is download mode forced over USB?
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this.RTCCNTL_BASE_REG = 0x3f408000;
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this.RTC_CNTL_WDTCONFIG0_REG = this.RTCCNTL_BASE_REG + 0x0094;
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this.RTC_CNTL_WDTCONFIG1_REG = this.RTCCNTL_BASE_REG + 0x0098;
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this.RTC_CNTL_WDTWPROTECT_REG = this.RTCCNTL_BASE_REG + 0x00ac;
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this.RTC_CNTL_WDT_WKEY = 0x50d83aa1;
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this.MEMORY_MAP = [
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[0x00000000, 0x00010000, "PADDING"],
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[0x3f000000, 0x3ff80000, "DROM"],
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[0x3f500000, 0x3ff80000, "EXTRAM_DATA"],
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[0x3ff9e000, 0x3ffa0000, "RTC_DRAM"],
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[0x3ff9e000, 0x40000000, "BYTE_ACCESSIBLE"],
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[0x3ff9e000, 0x40072000, "MEM_INTERNAL"],
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[0x3ffb0000, 0x40000000, "DRAM"],
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[0x40000000, 0x4001a100, "IROM_MASK"],
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[0x40020000, 0x40070000, "IRAM"],
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[0x40070000, 0x40072000, "RTC_IRAM"],
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[0x40080000, 0x40800000, "IROM"],
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[0x50000000, 0x50002000, "RTC_DATA"],
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];
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this.EFUSE_VDD_SPI_REG = this.EFUSE_BASE + 0x34;
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this.VDD_SPI_XPD = 1 << 4;
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this.VDD_SPI_TIEH = 1 << 5;
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this.VDD_SPI_FORCE = 1 << 6;
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this.UF2_FAMILY_ID = 0xbfdd4eee;
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this.EFUSE_MAX_KEY = 5;
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this.KEY_PURPOSES = {
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0: "USER/EMPTY",
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1: "RESERVED",
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2: "XTS_AES_256_KEY_1",
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3: "XTS_AES_256_KEY_2",
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4: "XTS_AES_128_KEY",
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5: "HMAC_DOWN_ALL",
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6: "HMAC_DOWN_JTAG",
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7: "HMAC_DOWN_DIGITAL_SIGNATURE",
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8: "HMAC_UP",
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9: "SECURE_BOOT_DIGEST0",
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10: "SECURE_BOOT_DIGEST1",
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11: "SECURE_BOOT_DIGEST2",
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};
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this.UART_CLKDIV_MASK = 0xfffff;
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this.UART_DATE_REG_ADDR = 0x60000078;
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this.FLASH_WRITE_SIZE = 0x400;
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this.BOOTLOADER_FLASH_OFFSET = 0x1000;
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this.FLASH_SIZES = {
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"1MB": 0x00,
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"2MB": 0x10,
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"4MB": 0x20,
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"8MB": 0x30,
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"16MB": 0x40,
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};
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}
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async getPkgVersion(loader) {
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const numWord = 4;
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const addr = this.EFUSE_BLOCK1_ADDR + 4 * numWord;
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const word = await loader.readReg(addr);
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const pkgVersion = (word >> 0) & 0x0f;
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return pkgVersion;
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}
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async getMinorChipVersion(loader) {
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const hiNumWord = 3;
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const hi = ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * hiNumWord)) >> 20) & 0x01;
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const lowNumWord = 4;
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const low = ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * lowNumWord)) >> 4) & 0x07;
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return (hi << 3) + low;
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}
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async getMajorChipVersion(loader) {
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const numWord = 3;
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return ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * numWord)) >> 18) & 0x03;
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}
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async getFlashVersion(loader) {
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const numWord = 3;
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return ((await loader.readReg(this.EFUSE_BLOCK1_ADDR + 4 * numWord)) >> 21) & 0x0f;
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}
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async getChipDescription(loader) {
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const chipDesc = {
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0: "ESP32-S2",
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1: "ESP32-S2FH2",
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2: "ESP32-S2FH4",
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102: "ESP32-S2FNR2",
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100: "ESP32-S2R2",
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};
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const chipIndex = (await this.getFlashCap(loader)) + (await this.getPsramCap(loader)) * 100;
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const majorRev = await this.getMajorChipVersion(loader);
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const minorRev = await this.getMinorChipVersion(loader);
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return `${chipDesc[chipIndex] || "unknown ESP32-S2"} (revision v${majorRev}.${minorRev})`;
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}
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async getFlashCap(loader) {
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return await this.getFlashVersion(loader);
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}
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async getPsramVersion(loader) {
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const numWord = 3;
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const addr = this.EFUSE_BLOCK1_ADDR + 4 * numWord;
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const registerValue = await loader.readReg(addr);
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const psramCap = (registerValue >> 28) & 0x0f;
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return psramCap;
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}
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async getPsramCap(loader) {
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return await this.getPsramVersion(loader);
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}
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async getBlock2Version(loader) {
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const numWord = 4;
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const addr = this.EFUSE_BLOCK2_ADDR + 4 * numWord;
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const registerValue = await loader.readReg(addr);
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const block2Ver = (registerValue >> 4) & 0x07;
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return block2Ver;
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}
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async getChipFeatures(loader) {
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const features = ["Wi-Fi"];
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const flashMap = {
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0: "No Embedded Flash",
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1: "Embedded Flash 2MB",
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2: "Embedded Flash 4MB",
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};
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const flashCap = await this.getFlashCap(loader);
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const flashDescription = flashMap[flashCap] || "Unknown Embedded Flash";
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features.push(flashDescription);
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const psramMap = {
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0: "No Embedded Flash",
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1: "Embedded PSRAM 2MB",
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2: "Embedded PSRAM 4MB",
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};
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const psramCap = await this.getPsramCap(loader);
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const psramDescription = psramMap[psramCap] || "Unknown Embedded PSRAM";
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features.push(psramDescription);
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const block2VersionMap = {
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0: "No calibration in BLK2 of efuse",
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1: "ADC and temperature sensor calibration in BLK2 of efuse V1",
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2: "ADC and temperature sensor calibration in BLK2 of efuse V2",
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};
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const block2Ver = await this.getBlock2Version(loader);
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const block2VersionDescription = block2VersionMap[block2Ver] || "Unknown Calibration in BLK2";
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features.push(block2VersionDescription);
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return features;
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}
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async getCrystalFreq(loader) {
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return 40;
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}
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_d2h(d) {
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const h = (+d).toString(16);
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return h.length === 1 ? "0" + h : h;
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}
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async readMac(loader) {
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let mac0 = await loader.readReg(this.MAC_EFUSE_REG);
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mac0 = mac0 >>> 0;
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let mac1 = await loader.readReg(this.MAC_EFUSE_REG + 4);
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mac1 = (mac1 >>> 0) & 0x0000ffff;
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const mac = new Uint8Array(6);
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mac[0] = (mac1 >> 8) & 0xff;
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mac[1] = mac1 & 0xff;
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mac[2] = (mac0 >> 24) & 0xff;
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mac[3] = (mac0 >> 16) & 0xff;
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mac[4] = (mac0 >> 8) & 0xff;
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mac[5] = mac0 & 0xff;
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return (this._d2h(mac[0]) +
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":" +
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this._d2h(mac[1]) +
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":" +
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this._d2h(mac[2]) +
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":" +
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this._d2h(mac[3]) +
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":" +
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this._d2h(mac[4]) +
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":" +
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this._d2h(mac[5]));
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}
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getEraseSize(offset, size) {
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return size;
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}
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async usingUsbOtg(loader) {
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const uartNo = (await loader.readReg(this.UARTDEV_BUF_NO)) & 0xff;
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return uartNo === this.UARTDEV_BUF_NO_USB_OTG;
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}
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async postConnect(loader) {
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const usingUsbOtg = await this.usingUsbOtg(loader);
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loader.debug("In _post_connect using USB OTG ?" + usingUsbOtg);
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if (usingUsbOtg) {
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loader.ESP_RAM_BLOCK = this.USB_RAM_BLOCK;
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}
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}
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}
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