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components/doc: Update doc about high-level interrupt

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some bugfix.
This commit is contained in:
baohongde
2020-12-24 21:30:36 +08:00
parent 57eeb4d953
commit 006a10b050
12 changed files with 192 additions and 93 deletions
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14
components/soc/esp32/include/soc/soc.h
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@@ -371,7 +371,7 @@
* 13 1 extern level
* 14 7 nmi Reserved Reserved
* 15 3 timer FreeRTOS Tick(L3) FreeRTOS Tick(L3)
* 16 5 timer
* 16 5 timer Reserved Reserved
* 17 1 extern level
* 18 1 extern level
* 19 2 extern level
@@ -403,15 +403,6 @@
#define ETS_CACHEERR_INUM ETS_MEMACCESS_ERR_INUM
#define ETS_IPC_ISR_INUM 31
//CPU0 Interrupt number used in ROM, should be cancelled in SDK
#define ETS_SLC_INUM 1
#define ETS_UART0_INUM 5
#define ETS_UART1_INUM 5
//Other interrupt number should be managed by the user
//Invalid interrupt for number interrupt matrix
#define ETS_INVALID_INUM 6
#elif CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4
//interrupt cpu using table, Please see the core-isa.h
@@ -464,6 +455,8 @@
#define ETS_CACHEERR_INUM ETS_MEMACCESS_ERR_INUM
#define ETS_IPC_ISR_INUM 28
#endif /* CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 */
//CPU0 Interrupt number used in ROM, should be cancelled in SDK
#define ETS_SLC_INUM 1
#define ETS_UART0_INUM 5
@@ -472,4 +465,3 @@
//Invalid interrupt for number interrupt matrix
#define ETS_INVALID_INUM 6
#endif /* CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 */