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fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access

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This commit is contained in:
Song Ruo Jing
2024-12-20 21:14:34 +08:00
parent 47f1a2c81b
commit 0077f642df
13 changed files with 50 additions and 55 deletions
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5
components/hal/esp32c3/include/hal/gpio_ll.h
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@@ -23,6 +23,7 @@
#include "soc/usb_serial_jtag_reg.h"
#include "hal/gpio_types.h"
#include "hal/assert.h"
#include "hal/misc.h"
#ifdef __cplusplus
extern "C" {
@@ -529,7 +530,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
{
typeof(hw->func_in_sel_cfg[in_sig_idx]) reg;
reg.val = hw->func_in_sel_cfg[in_sig_idx].val;
return (reg.sig_in_sel ? reg.func_sel : -1);
return (reg.sig_in_sel ? reg.in_sel : -1);
}
/**
@@ -751,7 +752,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
*od = hw->pin[gpio_num].pad_driver;
gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
*sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}