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fix(lp_i2c): Fixed a bug where the LP_I2C did not send NACK for 16-byte reads

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This commit updates the LP_I2C driver used by the LP CPU wherein the
driver did not send out a NACK when we do a read of multiple of the FIFO
depth bytes. This was because the LP I2C controller was configured to
send an ACK when the Rx FIFO reaches the threshold instead of a NACK.
This commit updates the behavior.
This commit is contained in:
Sudeep Mohanty
2023-08-07 10:43:16 +02:00
committed by BOT
parent 5b46ef3cdd
commit 00955f7e59
2 changed files with 17 additions and 0 deletions
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14
components/hal/esp32c6/include/hal/i2c_ll.h
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@@ -655,6 +655,20 @@ static inline void i2c_ll_master_clr_bus(i2c_dev_t *hw)
hw->ctr.conf_upgate = 1;
}
/**
* @brief Set the ACK level that the I2C master must send when the Rx FIFO count has reached the threshold value.
* ack_level: 1 (NACK)
* ack_level: 0 (ACK)
*
* @param hw Beginning address of the peripheral registers
*
* @return None
*/
static inline void i2c_ll_master_rx_full_ack_level(i2c_dev_t *hw, int ack_level)
{
hw->ctr.rx_full_ack_level = ack_level;
}
/**
* @brief Set I2C source clock
*