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refactor(sar): build sar_periph_ctrl related files by chip
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@@ -235,6 +235,10 @@ config SOC_ADC_RTC_MAX_BITWIDTH
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int
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default 12
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config SOC_ADC_SHARED_POWER
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bool
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default y
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config SOC_SHARED_IDCACHE_SUPPORTED
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bool
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default y
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@@ -134,6 +134,9 @@
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#define SOC_ADC_RTC_MIN_BITWIDTH (9)
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#define SOC_ADC_RTC_MAX_BITWIDTH (12)
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/*!< ADC power control is shared by PWDET */
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#define SOC_ADC_SHARED_POWER 1
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/*-------------------------- BROWNOUT CAPS -----------------------------------*/
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#if SOC_CAPS_ECO_VER >= 100
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#define SOC_BROWNOUT_RESET_SUPPORTED 1
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