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Merge branch 'feature/add_pkg_and_revision_for_c3' into 'master'
efuse(esp32c3): Adds getting chip_revision and chip_pkg See merge request espressif/esp-idf!12060
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@@ -760,12 +760,24 @@ extern "C" {
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#define EFUSE_SPI_PAD_CONF_1_S 0
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#define EFUSE_RD_MAC_SPI_SYS_3_REG (DR_REG_EFUSE_BASE + 0x050)
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/* EFUSE_SYS_DATA_PART0_0 : RO ;bitpos:[31:18] ;default: 14'h0 ; */
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/*description: Stores the fist 14 bits of the zeroth part of system data.*/
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#define EFUSE_SYS_DATA_PART0_0 0x00003FFF
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/* EFUSE_SYS_DATA_PART0_0 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
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/*description: Stores the fist 8 bits of the zeroth part of system data.*/
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#define EFUSE_SYS_DATA_PART0_0 0x000000FF
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#define EFUSE_SYS_DATA_PART0_0_M ((EFUSE_SYS_DATA_PART0_0_V)<<(EFUSE_SYS_DATA_PART0_0_S))
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#define EFUSE_SYS_DATA_PART0_0_V 0x3FFF
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#define EFUSE_SYS_DATA_PART0_0_S 18
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#define EFUSE_SYS_DATA_PART0_0_V 0xFF
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#define EFUSE_SYS_DATA_PART0_0_S 25
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/* EFUSE_PKG_VERSION : RO ;bitpos:[23:21] ;default: 3'h0 ; */
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/*description: Package version 0:ESP32-C3 */
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#define EFUSE_PKG_VERSION 0x00000007
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#define EFUSE_PKG_VERSION_M ((EFUSE_PKG_VERSION_V)<<(EFUSE_PKG_VERSION_S))
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#define EFUSE_PKG_VERSION_V 0x7
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#define EFUSE_PKG_VERSION_S 21
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/* EFUSE_WAFER_VERSION : RO ;bitpos:[20:18] ;default: 3'h0 ; */
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/*description: WAFER version 0:A */
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#define EFUSE_WAFER_VERSION 0x00000007
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#define EFUSE_WAFER_VERSION_M ((EFUSE_WAFER_VERSION_V)<<(EFUSE_WAFER_VERSION_S))
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#define EFUSE_WAFER_VERSION_V 0x7
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#define EFUSE_WAFER_VERSION_S 18
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/* EFUSE_SPI_PAD_CONF_2 : RO ;bitpos:[17:0] ;default: 18'h0 ; */
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/*description: Stores the second part of SPI_PAD_CONF.*/
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#define EFUSE_SPI_PAD_CONF_2 0x0003FFFF
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