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esp_system: fix the bug that some peripheral clocks are being disabled during cpu reset for esp32s2, c3, s3

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songruojing
2021-10-12 11:37:17 +08:00
parent ba15ac8634
commit 023bbe5cb1
5 changed files with 16 additions and 14 deletions
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4
components/esp_rom/include/esp32c3/rom/rtc.h
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@@ -93,8 +93,8 @@ typedef enum {
RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
RTCWDT_RTC_RESET = 16, /**<16, RTC Watch dog reset digital core and rtc module*/
TG1WDT_CPU_RESET = 17, /**<11, Time Group1 reset CPU*/
SUPER_WDT_RESET = 18, /**<11, super watchdog reset digital core and rtc module*/
TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
} RESET_REASON;
typedef enum {