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change(pm): remove rc32k for esp32c5

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This commit is contained in:
Lou Tianhao
2024-08-08 14:19:59 +08:00
parent debb6ab6a1
commit 02f5e0f98c
4 changed files with 38 additions and 20 deletions
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42
components/esp_hw_support/modem_clock.c
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@@ -420,18 +420,22 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
#if SOC_LIGHT_SLEEP_SUPPORTED #if SOC_LIGHT_SLEEP_SUPPORTED
/* The power domain of the low-power clock source required by the modem /* The power domain of the low-power clock source required by the modem
* module remains powered on during sleep */ * module remains powered on during sleep */
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \ esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) (
(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \ (last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST :
: (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \ (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL :
: (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \ #if !SOC_CLK_RC32K_NOT_TO_USE
: (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \ (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K :
: ESP_PD_DOMAIN_MAX); #endif
esp_sleep_pd_domain_t pu_domain = (esp_sleep_pd_domain_t) ( \ (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K :
(src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \ ESP_PD_DOMAIN_MAX);
: (src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \ esp_sleep_pd_domain_t pu_domain = (esp_sleep_pd_domain_t) (
: (src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \ (src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST :
: (src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \ (src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL :
: ESP_PD_DOMAIN_MAX); #if !SOC_CLK_RC32K_NOT_TO_USE
(src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K :
#endif
(src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K :
ESP_PD_DOMAIN_MAX);
esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF); esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
esp_sleep_pd_config(pu_domain, ESP_PD_OPTION_ON); esp_sleep_pd_config(pu_domain, ESP_PD_OPTION_ON);
#endif #endif
@@ -478,13 +482,15 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
} }
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \
: (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \
: (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \
: (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \
: ESP_PD_DOMAIN_MAX);
#if SOC_LIGHT_SLEEP_SUPPORTED #if SOC_LIGHT_SLEEP_SUPPORTED
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) (
(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST :
(last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL :
#if !SOC_CLK_RC32K_NOT_TO_USE
(last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K :
#endif
(last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K :
ESP_PD_DOMAIN_MAX);
esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF); esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
#endif #endif
} }

4
components/esp_hw_support/sleep_modes.c
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@@ -2292,9 +2292,13 @@ static uint32_t get_power_down_flags(void)
} }
#endif #endif
#if SOC_PM_SUPPORT_RC32K_PD #if SOC_PM_SUPPORT_RC32K_PD
#if !SOC_CLK_RC32K_NOT_TO_USE
if (s_config.domain[ESP_PD_DOMAIN_RC32K].pd_option != ESP_PD_OPTION_ON) { if (s_config.domain[ESP_PD_DOMAIN_RC32K].pd_option != ESP_PD_OPTION_ON) {
pd_flags |= PMU_SLEEP_PD_RC32K; pd_flags |= PMU_SLEEP_PD_RC32K;
} }
#else
pd_flags |= PMU_SLEEP_PD_RC32K;
#endif
#endif #endif
#if SOC_PM_SUPPORT_RC_FAST_PD #if SOC_PM_SUPPORT_RC_FAST_PD
if (s_config.domain[ESP_PD_DOMAIN_RC_FAST].pd_option != ESP_PD_OPTION_ON) { if (s_config.domain[ESP_PD_DOMAIN_RC_FAST].pd_option != ESP_PD_OPTION_ON) {

8
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
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@@ -1227,6 +1227,10 @@ config SOC_PM_SUPPORT_XTAL32K_PD
bool bool
default y default y
config SOC_PM_SUPPORT_RC32K_PD
bool
default y
config SOC_PM_SUPPORT_RC_FAST_PD config SOC_PM_SUPPORT_RC_FAST_PD
bool bool
default y default y
@@ -1299,6 +1303,10 @@ config SOC_CLK_LP_FAST_SUPPORT_XTAL
bool bool
default y default y
config SOC_CLK_RC32K_NOT_TO_USE
bool
default y
config SOC_RCC_IS_INDEPENDENT config SOC_RCC_IS_INDEPENDENT
bool bool
default y default y

4
components/soc/esp32c5/include/soc/soc_caps.h
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@@ -544,7 +544,7 @@
#define SOC_PM_SUPPORT_CPU_PD (1) #define SOC_PM_SUPPORT_CPU_PD (1)
#define SOC_PM_SUPPORT_MODEM_PD (1) #define SOC_PM_SUPPORT_MODEM_PD (1)
#define SOC_PM_SUPPORT_XTAL32K_PD (1) #define SOC_PM_SUPPORT_XTAL32K_PD (1)
// #define SOC_PM_SUPPORT_RC32K_PD (1) #define SOC_PM_SUPPORT_RC32K_PD (1)
#define SOC_PM_SUPPORT_RC_FAST_PD (1) #define SOC_PM_SUPPORT_RC_FAST_PD (1)
#define SOC_PM_SUPPORT_VDDSDIO_PD (1) #define SOC_PM_SUPPORT_VDDSDIO_PD (1)
#define SOC_PM_SUPPORT_TOP_PD (1) #define SOC_PM_SUPPORT_TOP_PD (1)
@@ -575,7 +575,7 @@
#define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */
#define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */ #define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */
#define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */ #define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */
#define SOC_CLK_RC32K_NOT_TO_USE (1) /*!< Due to the poor low-temperature characteristics of RC32K (it cannot operate below -40 degrees Celsius), please avoid using it whenever possible. */
#define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */ #define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/