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https://github.com/espressif/esp-idf.git
synced 2025-08-08 12:10:59 +00:00
change(pm): remove rc32k for esp32c5
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@@ -420,18 +420,22 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
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#if SOC_LIGHT_SLEEP_SUPPORTED
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/* The power domain of the low-power clock source required by the modem
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* module remains powered on during sleep */
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esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
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(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \
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: (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \
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: (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \
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: (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \
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: ESP_PD_DOMAIN_MAX);
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esp_sleep_pd_domain_t pu_domain = (esp_sleep_pd_domain_t) ( \
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(src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \
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: (src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \
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: (src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \
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: (src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \
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: ESP_PD_DOMAIN_MAX);
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esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) (
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(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST :
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(last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL :
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#if !SOC_CLK_RC32K_NOT_TO_USE
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(last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K :
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#endif
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(last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K :
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ESP_PD_DOMAIN_MAX);
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esp_sleep_pd_domain_t pu_domain = (esp_sleep_pd_domain_t) (
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(src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST :
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(src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL :
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#if !SOC_CLK_RC32K_NOT_TO_USE
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(src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K :
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#endif
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(src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K :
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ESP_PD_DOMAIN_MAX);
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esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
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esp_sleep_pd_config(pu_domain, ESP_PD_OPTION_ON);
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#endif
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@@ -478,13 +482,15 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
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}
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portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
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esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
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(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \
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: (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \
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: (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \
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: (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \
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: ESP_PD_DOMAIN_MAX);
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#if SOC_LIGHT_SLEEP_SUPPORTED
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esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) (
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(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST :
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(last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL :
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#if !SOC_CLK_RC32K_NOT_TO_USE
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(last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K :
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#endif
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(last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K :
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ESP_PD_DOMAIN_MAX);
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esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
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#endif
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}
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@@ -2292,9 +2292,13 @@ static uint32_t get_power_down_flags(void)
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}
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#endif
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#if SOC_PM_SUPPORT_RC32K_PD
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#if !SOC_CLK_RC32K_NOT_TO_USE
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if (s_config.domain[ESP_PD_DOMAIN_RC32K].pd_option != ESP_PD_OPTION_ON) {
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pd_flags |= PMU_SLEEP_PD_RC32K;
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}
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#else
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pd_flags |= PMU_SLEEP_PD_RC32K;
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#endif
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#endif
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#if SOC_PM_SUPPORT_RC_FAST_PD
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if (s_config.domain[ESP_PD_DOMAIN_RC_FAST].pd_option != ESP_PD_OPTION_ON) {
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@@ -1227,6 +1227,10 @@ config SOC_PM_SUPPORT_XTAL32K_PD
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bool
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default y
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config SOC_PM_SUPPORT_RC32K_PD
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bool
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default y
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config SOC_PM_SUPPORT_RC_FAST_PD
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bool
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default y
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@@ -1299,6 +1303,10 @@ config SOC_CLK_LP_FAST_SUPPORT_XTAL
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bool
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default y
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config SOC_CLK_RC32K_NOT_TO_USE
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bool
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default y
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config SOC_RCC_IS_INDEPENDENT
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bool
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default y
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@@ -544,7 +544,7 @@
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#define SOC_PM_SUPPORT_CPU_PD (1)
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#define SOC_PM_SUPPORT_MODEM_PD (1)
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#define SOC_PM_SUPPORT_XTAL32K_PD (1)
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// #define SOC_PM_SUPPORT_RC32K_PD (1)
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#define SOC_PM_SUPPORT_RC32K_PD (1)
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#define SOC_PM_SUPPORT_RC_FAST_PD (1)
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#define SOC_PM_SUPPORT_VDDSDIO_PD (1)
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#define SOC_PM_SUPPORT_TOP_PD (1)
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@@ -575,7 +575,7 @@
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#define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */
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#define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */
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#define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */
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#define SOC_CLK_RC32K_NOT_TO_USE (1) /*!< Due to the poor low-temperature characteristics of RC32K (it cannot operate below -40 degrees Celsius), please avoid using it whenever possible. */
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#define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */
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/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
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