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ulp: fix I_{RD,WR}_REG definitions
- I_RD_REG used the wrong union member (.rd_reg) due to a copy-paste mistake - Peripheral register address in bits[7:0] should be given in words, not in bytes Fixes https://github.com/espressif/esp-idf/issues/297
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@@ -307,7 +307,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
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* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
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*/
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#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
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.addr = reg & 0xff, \
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.addr = (reg & 0xff) / sizeof(uint32_t), \
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.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
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.data = val, \
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.low = low_bit, \
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@@ -320,8 +320,8 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
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* R0 = reg[high_bit : low_bit]
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* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
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*/
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#define I_RD_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
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.addr = reg & 0xff, \
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#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
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.addr = (reg & 0xff) / sizeof(uint32_t), \
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.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
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.unused = 0, \
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.low = low_bit, \
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