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Merge branch 'master' into feature/esp32s2beta_update

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Angus Gratton
2019-08-08 14:00:45 +10:00
committed by Angus Gratton
parent 24d26fccde 51d811a71c
commit 04ae56806c
657 changed files with 6814 additions and 7534 deletions
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14
components/spi_flash/cache_utils.h
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@@ -25,30 +25,30 @@
*/
// Init mutex protecting access to spi_flash_* APIs
void spi_flash_init_lock();
void spi_flash_init_lock(void);
// Take mutex protecting access to spi_flash_* APIs
void spi_flash_op_lock();
void spi_flash_op_lock(void);
// Release said mutex
void spi_flash_op_unlock();
void spi_flash_op_unlock(void);
// Suspend the scheduler on both CPUs, disable cache.
// Contrary to its name this doesn't do anything with interrupts, yet.
// Interrupt disabling capability will be added once we implement
// interrupt allocation API.
void spi_flash_disable_interrupts_caches_and_other_cpu();
void spi_flash_disable_interrupts_caches_and_other_cpu(void);
// Enable cache, enable interrupts (to be added in future), resume scheduler
void spi_flash_enable_interrupts_caches_and_other_cpu();
void spi_flash_enable_interrupts_caches_and_other_cpu(void);
// Disables non-IRAM interrupt handlers on current CPU and caches on both CPUs.
// This function is implied to be called when other CPU is not running or running code from IRAM.
void spi_flash_disable_interrupts_caches_and_other_cpu_no_os();
void spi_flash_disable_interrupts_caches_and_other_cpu_no_os(void);
// Enable cache, enable interrupts on current CPU.
// This function is implied to be called when other CPU is not running or running code from IRAM.
void spi_flash_enable_interrupts_caches_no_os();
void spi_flash_enable_interrupts_caches_no_os(void);
// Flushes cache if address range has corresponding valid cache mappings
// Recommended to use post flash program operation (erase or write)