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feat(sdmmc): supported UHS-I SDR50 (100Mhz) and DDR50 mode

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This commit is contained in:
Armando
2024-11-06 12:09:25 +08:00
parent 31dc34a909
commit 04cd469e4a
26 changed files with 650 additions and 131 deletions
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24
components/esp_driver_sdmmc/include/driver/sdmmc_default_configs.h
View File

@@ -31,6 +31,8 @@ extern "C" {
.slot = SDMMC_HOST_SLOT_1, \
.max_freq_khz = SDMMC_FREQ_DEFAULT, \
.io_voltage = 3.3f, \
.driver_strength = SDMMC_DRIVER_STRENGTH_B, \
.current_limit = SDMMC_CURRENT_LIMIT_200MA, \
.init = &sdmmc_host_init, \
.set_bus_width = &sdmmc_host_set_bus_width, \
.get_bus_width = &sdmmc_host_get_slot_width, \
@@ -48,29 +50,35 @@ extern "C" {
.dma_aligned_buffer = NULL, \
.pwr_ctrl_handle = NULL, \
.get_dma_info = &sdmmc_host_get_dma_info, \
.is_slot_set_to_uhs1 = &sdmmc_host_is_slot_set_to_uhs1, \
}
#define SDMMC_SLOT_NO_CD GPIO_NUM_NC ///< indicates that card detect line is not used
#define SDMMC_SLOT_NO_WP GPIO_NUM_NC ///< indicates that write protect line is not used
#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the maximum possible width for the slot
#if SOC_SDMMC_USE_IOMUX && !SOC_SDMMC_USE_GPIO_MATRIX
/**
* Macro defining default configuration of SDMMC host slot
*/
#if CONFIG_IDF_TARGET_ESP32
#define SDMMC_SLOT_CONFIG_DEFAULT() {\
.clk = GPIO_NUM_6, \
.cmd = GPIO_NUM_11, \
.d0 = GPIO_NUM_7, \
.d1 = GPIO_NUM_8, \
.d2 = GPIO_NUM_9, \
.d3 = GPIO_NUM_10, \
.d4 = GPIO_NUM_16, \
.d5 = GPIO_NUM_17, \
.d6 = GPIO_NUM_5, \
.d7 = GPIO_NUM_18, \
.cd = SDMMC_SLOT_NO_CD, \
.wp = SDMMC_SLOT_NO_WP, \
.width = SDMMC_SLOT_WIDTH_DEFAULT, \
.flags = 0, \
}
#else
/**
* Macro defining default configuration of SDMMC host slot
*/
#if CONFIG_IDF_TARGET_ESP32P4
#elif CONFIG_IDF_TARGET_ESP32P4
#define SDMMC_SLOT_CONFIG_DEFAULT() {\
.clk = GPIO_NUM_43, \
.cmd = GPIO_NUM_44, \
@@ -107,8 +115,6 @@ extern "C" {
}
#endif // GPIO Matrix chips
#endif
#ifdef __cplusplus
}
#endif

16
components/esp_driver_sdmmc/include/driver/sdmmc_host.h
View File

@@ -24,7 +24,6 @@ extern "C" {
* Extra configuration for SDMMC peripheral slot
*/
typedef struct {
#ifdef SOC_SDMMC_USE_GPIO_MATRIX
gpio_num_t clk; ///< GPIO number of CLK signal.
gpio_num_t cmd; ///< GPIO number of CMD signal.
gpio_num_t d0; ///< GPIO number of D0 signal.
@@ -35,7 +34,6 @@ typedef struct {
gpio_num_t d5; ///< GPIO number of D5 signal. Ignored in 1- or 4- line mode.
gpio_num_t d6; ///< GPIO number of D6 signal. Ignored in 1- or 4- line mode.
gpio_num_t d7; ///< GPIO number of D7 signal. Ignored in 1- or 4- line mode.
#endif // SOC_SDMMC_USE_GPIO_MATRIX
union {
gpio_num_t gpio_cd; ///< GPIO number of card detect signal
gpio_num_t cd; ///< GPIO number of card detect signal; shorter name.
@@ -56,6 +54,8 @@ typedef struct {
* 0 means "active low", i.e. card is protected when the GPIO is low;
* 1 means "active high", i.e. card is protected when GPIO is high.
*/
#define SDMMC_SLOT_FLAG_UHS1 BIT(2)
/**< Enable UHS-I mode for this slot */
} sdmmc_slot_config_t;
/**
@@ -284,6 +284,18 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase);
*/
esp_err_t sdmmc_host_get_dma_info(int slot, esp_dma_mem_info_t *dma_mem_info);
/**
* @brief Check if the slot is set to uhs1 or not
*
* @param[in] slot Slot id
* @param[out] is_uhs1 Is uhs1 or not
*
* @return
* - ESP_OK: on success
* - ESP_ERR_INVALID_STATE: driver not in correct state
*/
esp_err_t sdmmc_host_is_slot_set_to_uhs1(int slot, bool *is_uhs1);
/**
* @brief Get the state of SDMMC host
*