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feat(sdmmc): supported UHS-I SDR50 (100Mhz) and DDR50 mode
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@@ -46,6 +46,7 @@ extern "C" {
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#define MMC_SET_BLOCKLEN 16 /* R1 */
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#define MMC_READ_BLOCK_SINGLE 17 /* R1 */
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#define MMC_READ_BLOCK_MULTIPLE 18 /* R1 */
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#define MMC_SEND_TUNING_BLOCK 19 /* R1 */
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#define MMC_WRITE_DAT_UNTIL_STOP 20 /* R1 */
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#define MMC_SET_BLOCK_COUNT 23 /* R1 */
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#define MMC_WRITE_BLOCK_SINGLE 24 /* R1 */
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@@ -303,6 +304,8 @@ extern "C" {
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#define SD_CSD_SPEED(resp) MMC_RSP_BITS((resp), 96, 8)
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#define SD_CSD_SPEED_25_MHZ 0x32
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#define SD_CSD_SPEED_50_MHZ 0x5a
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#define SD_CSD_SPEED_100_MHZ 0xb
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#define SD_CSD_SPEED_200_MHZ 0x2b
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#define SD_CSD_CCC(resp) MMC_RSP_BITS((resp), 84, 12)
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#define SD_CSD_CCC_BASIC (1 << 0) /* basic */
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#define SD_CSD_CCC_BR (1 << 2) /* block read */
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@@ -416,6 +419,14 @@ extern "C" {
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#define SD_SFUNC_FUNC_MAX 15
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#define SD_ACCESS_MODE 1 /* Function group 1, Access Mode */
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#define SD_COMMAND_SYSTEM 2 /* Function group 1, Command System */
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#define SD_DRIVER_STRENGTH 3 /* Function group 1, Driver Strength */
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#define SD_CURRENT_LIMIT 4 /* Function group 1, Current Limit */
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#define SD_DRIVER_STRENGTH_B 0 /* Type B */
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#define SD_DRIVER_STRENGTH_A 1 /* Type A */
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#define SD_DRIVER_STRENGTH_C 2 /* Type C */
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#define SD_DRIVER_STRENGTH_D 3 /* Type D */
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#define SD_ACCESS_MODE_SDR12 0 /* 25 MHz clock */
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#define SD_ACCESS_MODE_SDR25 1 /* 50 MHz clock */
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