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CI: enable example builds for C3

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Enables building C3 examples in CI.

Fixes related warnings/errors and disables examples that cannot run.
This commit is contained in:
Marius Vikhammer
2020-12-15 11:00:02 +08:00
parent 1de3f00012
commit 04df1f3a42
47 changed files with 245 additions and 94 deletions
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17
examples/peripherals/spi_slave/sender/main/app_main.c
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@@ -50,12 +50,23 @@ task waits for this semaphore to be given before queueing a transmission.
/*
Pins in use. The SPI Master can use the GPIO mux, so feel free to change these if needed.
*/
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
#define GPIO_HANDSHAKE 2
#define GPIO_MOSI 12
#define GPIO_MISO 13
#define GPIO_SCLK 15
#define GPIO_CS 14
#elif CONFIG_IDF_TARGET_ESP32C3
#define GPIO_HANDSHAKE 3
#define GPIO_MOSI 7
#define GPIO_MISO 2
#define GPIO_SCLK 6
#define GPIO_CS 10
#endif //CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
#ifdef CONFIG_IDF_TARGET_ESP32
#define SENDER_HOST HSPI_HOST
#define DMA_CHAN 2
@@ -64,6 +75,10 @@ Pins in use. The SPI Master can use the GPIO mux, so feel free to change these i
#define SENDER_HOST SPI2_HOST
#define DMA_CHAN SENDER_HOST
#elif defined CONFIG_IDF_TARGET_ESP32C3
#define SENDER_HOST SPI2_HOST
#define DMA_CHAN SENDER_HOST
#endif
@@ -78,7 +93,7 @@ static void IRAM_ATTR gpio_handshake_isr_handler(void* arg)
//Sometimes due to interference or ringing or something, we get two irqs after eachother. This is solved by
//looking at the time between interrupts and refusing any interrupt too close to another one.
static uint32_t lasthandshaketime;
uint32_t currtime=xthal_get_ccount();
uint32_t currtime=esp_cpu_get_ccount();
uint32_t diff=currtime-lasthandshaketime;
if (diff<240000) return; //ignore everything <1ms after an earlier irq
lasthandshaketime=currtime;