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feat(esp_system): gate some clock by default to optmize esp32p4 active power
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@@ -682,6 +682,19 @@ FORCE_INLINE_ATTR void uart_ll_set_wakeup_thrd(uart_dev_t *hw, uint32_t wakeup_t
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hw->sleep_conf.active_threshold = wakeup_thrd - UART_LL_MIN_WAKEUP_THRESH;
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}
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/**
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* @brief Enable/disable the UART pad clock in sleep_state
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*
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* @param hw Beginning address of the peripheral registers.
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* @param enable enable or disable
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*/
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FORCE_INLINE_ATTR void _uart_ll_enable_pad_sleep_clock(uart_dev_t *hw, bool enable)
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{
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(void)hw; (void)enable;
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}
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#define uart_ll_enable_pad_sleep_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _uart_ll_enable_pad_sleep_clock(__VA_ARGS__)
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/**
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* @brief Configure the UART work in normal mode.
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*
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