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feat(esp_system): gate some clock by default to optmize esp32p4 active power

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This commit is contained in:
wuzhenghui
2024-08-20 13:32:02 +08:00
parent fba9b50456
commit 05e74480f5
66 changed files with 769 additions and 189 deletions
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4
components/hal/esp32p4/include/hal/ds_ll.h
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@@ -30,14 +30,14 @@ extern "C" {
*
* @param true to enable the module, false to disable the module
*/
static inline void ds_ll_enable_bus_clock(bool enable)
static inline void _ds_ll_enable_bus_clock(bool enable)
{
HP_SYS_CLKRST.peri_clk_ctrl25.reg_crypto_ds_clk_en = enable;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ds_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_enable_bus_clock(__VA_ARGS__)
#define ds_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _ds_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DS peripheral module