alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-16 15:04:22 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'refactor/gptimer_software_capture' into 'master'

Browse Source 
split gptimer software capture in hal driver

See merge request espressif/esp-idf!19749
This commit is contained in:
morris
2022-08-26 13:25:25 +08:00
parent e219510c9d 995b89fbb6
commit 060f3a3b13
16 changed files with 171 additions and 190 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
components/driver/deprecated/timer_legacy.c
View File

@@ -63,7 +63,7 @@ esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num
ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
*timer_val = timer_ll_get_counter_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
*timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
return ESP_OK;
}
@@ -74,7 +74,7 @@ esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_
ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
uint64_t timer_val = timer_ll_get_counter_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
uint64_t timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
uint32_t div = p_timer_obj[group_num][timer_num]->divider;
// [clk_tree] TODO: replace the following switch table by clk_tree API
switch (p_timer_obj[group_num][timer_num]->clk_src) {
@@ -432,6 +432,7 @@ void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_id
uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
{
timer_ll_trigger_soft_capture(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
uint64_t val = timer_ll_get_counter_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
return val;
}

4
components/driver/gptimer.c
View File

@@ -236,7 +236,7 @@ esp_err_t gptimer_get_raw_count(gptimer_handle_t timer, unsigned long long *valu
ESP_RETURN_ON_FALSE_ISR(timer && value, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
portENTER_CRITICAL_SAFE(&timer->spinlock);
*value = timer_ll_get_counter_value(timer->hal.dev, timer->timer_id);
*value = timer_hal_capture_and_get_counter_value(&timer->hal);
portEXIT_CRITICAL_SAFE(&timer->spinlock);
return ESP_OK;
}
@@ -497,7 +497,7 @@ IRAM_ATTR static void gptimer_default_isr(void *args)
if (intr_status & TIMER_LL_EVENT_ALARM(timer->timer_id)) {
// Note: when alarm event happens, the alarm will be disabled automatically by hardware
gptimer_alarm_event_data_t edata = {
.count_value = timer_ll_get_counter_value(timer->hal.dev, timer->timer_id),
.count_value = timer_hal_capture_and_get_counter_value(&timer->hal),
.alarm_value = timer->alarm_count,
};

37
components/driver/include/driver/gptimer.h
View File

@@ -31,9 +31,9 @@ typedef struct {
/**
* @brief Timer alarm callback prototype
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @param[in] edata Alarm event data, fed by driver
* @param[in] user_ctx User data, passed from `gptimer_register_event_callbacks()`
* @param[in] user_ctx User data, passed from `gptimer_register_event_callbacks`
* @return Whether a high priority task has been waken up by this function
*/
typedef bool (*gptimer_alarm_cb_t) (gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx);
@@ -91,9 +91,9 @@ esp_err_t gptimer_new_timer(const gptimer_config_t *config, gptimer_handle_t *re
* @brief Delete the GPTimer handle
*
* @note A timer can't be in the enable state when this function is invoked.
* See also `gptimer_disable()` for how to disable a timer.
* See also `gptimer_disable` for how to disable a timer.
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @return
* - ESP_OK: Delete GPTimer successfully
* - ESP_ERR_INVALID_ARG: Delete GPTimer failed because of invalid argument
@@ -109,7 +109,7 @@ esp_err_t gptimer_del_timer(gptimer_handle_t timer);
* @note This function is allowed to run within ISR context
* @note This function is allowed to be executed when Cache is disabled, by enabling `CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM`
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @param[in] value Count value to be set
* @return
* - ESP_OK: Set GPTimer raw count value successfully
@@ -121,11 +121,12 @@ esp_err_t gptimer_set_raw_count(gptimer_handle_t timer, uint64_t value);
/**
* @brief Get GPTimer raw count value
*
* @note This function will trigger a software capture event and then return the captured count value.
* @note With the raw count value and the resolution set in the `gptimer_config_t`, you can convert the count value into seconds.
* @note This function is allowed to run within ISR context
* @note This function is allowed to be executed when Cache is disabled, by enabling `CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM`
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @param[out] value Returned GPTimer count value
* @return
* - ESP_OK: Get GPTimer raw count value successfully
@@ -141,7 +142,7 @@ esp_err_t gptimer_get_raw_count(gptimer_handle_t timer, uint64_t *value);
* @note The first call to this function needs to be before the call to `gptimer_enable`
* @note User can deregister a previously registered callback by calling this function and setting the callback member in the `cbs` structure to NULL.
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @param[in] cbs Group of callback functions
* @param[in] user_data User data, which will be passed to callback functions directly
* @return
@@ -158,7 +159,7 @@ esp_err_t gptimer_register_event_callbacks(gptimer_handle_t timer, const gptimer
* @note This function is allowed to run within ISR context, so that user can set new alarm action immediately in the ISR callback.
* @note This function is allowed to be executed when Cache is disabled, by enabling `CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM`
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @param[in] config Alarm configuration, especially, set config to NULL means disabling the alarm function
* @return
* - ESP_OK: Set alarm action for GPTimer successfully
@@ -171,11 +172,11 @@ esp_err_t gptimer_set_alarm_action(gptimer_handle_t timer, const gptimer_alarm_c
* @brief Enable GPTimer
*
* @note This function will transit the timer state from init to enable.
* @note This function will enable the interrupt service, if it's lazy installed in `gptimer_register_event_callbacks()`.
* @note This function will enable the interrupt service, if it's lazy installed in `gptimer_register_event_callbacks`.
* @note This function will acquire a PM lock, if a specific source clock (e.g. APB) is selected in the `gptimer_config_t`, while `CONFIG_PM_ENABLE` is enabled.
* @note Enable a timer doesn't mean to start it. See also `gptimer_start()` for how to make the timer start counting.
* @note Enable a timer doesn't mean to start it. See also `gptimer_start` for how to make the timer start counting.
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @return
* - ESP_OK: Enable GPTimer successfully
* - ESP_ERR_INVALID_ARG: Enable GPTimer failed because of invalid argument
@@ -187,10 +188,10 @@ esp_err_t gptimer_enable(gptimer_handle_t timer);
/**
* @brief Disable GPTimer
*
* @note This function will do the opposite work to the `gptimer_enable()`
* @note Disable a timer doesn't mean to stop it. See also `gptimer_stop()` for how to make the timer stop counting.
* @note This function will do the opposite work to the `gptimer_enable`
* @note Disable a timer doesn't mean to stop it. See also `gptimer_stop` for how to make the timer stop counting.
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @return
* - ESP_OK: Disable GPTimer successfully
* - ESP_ERR_INVALID_ARG: Disable GPTimer failed because of invalid argument
@@ -202,11 +203,11 @@ esp_err_t gptimer_disable(gptimer_handle_t timer);
/**
* @brief Start GPTimer (internal counter starts counting)
*
* @note This function should be called when the timer is in the enable state (i.e. after calling `gptimer_enable()`)
* @note This function should be called when the timer is in the enable state (i.e. after calling `gptimer_enable`)
* @note This function is allowed to run within ISR context
* @note This function will be placed into IRAM if `CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM` is on, so that it's allowed to be executed when Cache is disabled
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @return
* - ESP_OK: Start GPTimer successfully
* - ESP_ERR_INVALID_ARG: Start GPTimer failed because of invalid argument
@@ -218,11 +219,11 @@ esp_err_t gptimer_start(gptimer_handle_t timer);
/**
* @brief Stop GPTimer (internal counter stops counting)
*
* @note This function should be called when the timer is in the enable state (i.e. after calling `gptimer_enable()`)
* @note This function should be called when the timer is in the enable state (i.e. after calling `gptimer_enable`)
* @note This function is allowed to run within ISR context
* @note This function will be placed into IRAM if `CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM` is on, so that it's allowed to be executed when Cache is disabled
*
* @param[in] timer Timer handle created by `gptimer_new_timer()`
* @param[in] timer Timer handle created by `gptimer_new_timer`
* @return
* - ESP_OK: Stop GPTimer successfully
* - ESP_ERR_INVALID_ARG: Stop GPTimer failed because of invalid argument

2
components/driver/test_apps/gptimer/sdkconfig.defaults
View File

@@ -1,2 +1,4 @@
CONFIG_FREERTOS_HZ=1000
CONFIG_ESP_TASK_WDT=n
# Disable nano printf, because we need to print the timer count in %llu format
CONFIG_NEWLIB_NANO_FORMAT=n

3
components/esp_adc/test_apps/adc/sdkconfig.ci.iram_safe
View File

@@ -1,8 +1,9 @@
CONFIG_COMPILER_DUMP_RTL_FILES=y
CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM=y
CONFIG_GPTIMER_ISR_IRAM_SAFE=y
CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM=y
CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE=y
CONFIG_COMPILER_OPTIMIZATION_NONE=y
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
# silent the error check, as the error string are stored in rodata, causing RTL check failure
CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

104
components/esp_rom/include/esp32c2/rom/tjpgd.h
View File

@@ -1,104 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/*----------------------------------------------------------------------------/
/ TJpgDec - Tiny JPEG Decompressor include file (C)ChaN, 2012
/----------------------------------------------------------------------------*/
#ifndef _TJPGDEC
#define _TJPGDEC
/*---------------------------------------------------------------------------*/
/* System Configurations */
#define JD_SZBUF 512 /* Size of stream input buffer */
#define JD_FORMAT 0 /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
#define JD_USE_SCALE 1 /* Use descaling feature for output */
#define JD_TBLCLIP 1 /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/* These types must be 16-bit, 32-bit or larger integer */
typedef int INT;
typedef unsigned int UINT;
/* These types must be 8-bit integer */
typedef char CHAR;
typedef unsigned char UCHAR;
typedef unsigned char BYTE;
/* These types must be 16-bit integer */
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types must be 32-bit integer */
typedef long LONG;
typedef unsigned long ULONG;
typedef unsigned long DWORD;
/* Error code */
typedef enum {
JDR_OK = 0, /* 0: Succeeded */
JDR_INTR, /* 1: Interrupted by output function */
JDR_INP, /* 2: Device error or wrong termination of input stream */
JDR_MEM1, /* 3: Insufficient memory pool for the image */
JDR_MEM2, /* 4: Insufficient stream input buffer */
JDR_PAR, /* 5: Parameter error */
JDR_FMT1, /* 6: Data format error (may be damaged data) */
JDR_FMT2, /* 7: Right format but not supported */
JDR_FMT3 /* 8: Not supported JPEG standard */
} JRESULT;
/* Rectangular structure */
typedef struct {
WORD left, right, top, bottom;
} JRECT;
/* Decompressor object structure */
typedef struct JDEC JDEC;
struct JDEC {
UINT dctr; /* Number of bytes available in the input buffer */
BYTE *dptr; /* Current data read ptr */
BYTE *inbuf; /* Bit stream input buffer */
BYTE dmsk; /* Current bit in the current read byte */
BYTE scale; /* Output scaling ratio */
BYTE msx, msy; /* MCU size in unit of block (width, height) */
BYTE qtid[3]; /* Quantization table ID of each component */
SHORT dcv[3]; /* Previous DC element of each component */
WORD nrst; /* Restart inverval */
UINT width, height; /* Size of the input image (pixel) */
BYTE *huffbits[2][2]; /* Huffman bit distribution tables [id][dcac] */
WORD *huffcode[2][2]; /* Huffman code word tables [id][dcac] */
BYTE *huffdata[2][2]; /* Huffman decoded data tables [id][dcac] */
LONG *qttbl[4]; /* Dequaitizer tables [id] */
void *workbuf; /* Working buffer for IDCT and RGB output */
BYTE *mcubuf; /* Working buffer for the MCU */
void *pool; /* Pointer to available memory pool */
UINT sz_pool; /* Size of momory pool (bytes available) */
UINT (*infunc)(JDEC *, BYTE *, UINT); /* Pointer to jpeg stream input function */
void *device; /* Pointer to I/O device identifiler for the session */
};
/* TJpgDec API functions */
JRESULT jd_prepare (JDEC *, UINT(*)(JDEC *, BYTE *, UINT), void *, UINT, void *);
JRESULT jd_decomp (JDEC *, UINT(*)(JDEC *, void *, JRECT *), BYTE);
#ifdef __cplusplus
}
#endif
#endif /* _TJPGDEC */

21
components/hal/esp32/include/hal/timer_ll.h
View File

@@ -112,6 +112,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
hw->hw_timer[timer_num].config.tx_en = en;
}
/**
* @brief Trigger software capture event
*
* @param hw Timer Group register base address
* @param timer_num Timer number in the group
*/
__attribute__((always_inline))
static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
}
/**
* @brief Get counter value
*
@@ -123,11 +139,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
__attribute__((always_inline))
static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
}

21
components/hal/esp32c2/include/hal/timer_ll.h
View File

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
hw->hw_timer[timer_num].config.tx_en = en;
}
/**
* @brief Trigger software capture event
*
* @param hw Timer Group register base address
* @param timer_num Timer number in the group
*/
__attribute__((always_inline))
static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
}
/**
* @brief Get counter value
*
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
__attribute__((always_inline))
static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
}

21
components/hal/esp32c3/include/hal/timer_ll.h
View File

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
hw->hw_timer[timer_num].config.tx_en = en;
}
/**
* @brief Trigger software capture event
*
* @param hw Timer Group register base address
* @param timer_num Timer number in the group
*/
__attribute__((always_inline))
static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
}
/**
* @brief Get counter value
*
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
__attribute__((always_inline))
static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
}

21
components/hal/esp32h2/include/hal/timer_ll.h
View File

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
hw->hw_timer[timer_num].config.tx_en = en;
}
/**
* @brief Trigger software capture event
*
* @param hw Timer Group register base address
* @param timer_num Timer number in the group
*/
__attribute__((always_inline))
static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
}
/**
* @brief Get counter value
*
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
__attribute__((always_inline))
static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
}

21
components/hal/esp32s2/include/hal/timer_ll.h
View File

@@ -116,6 +116,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
hw->hw_timer[timer_num].config.tx_en = en;
}
/**
* @brief Trigger software capture event
*
* @param hw Timer Group register base address
* @param timer_num Timer number in the group
*/
__attribute__((always_inline))
static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
}
/**
* @brief Get counter value
*
@@ -127,11 +143,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
__attribute__((always_inline))
static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tx_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tx_update) {
}
return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
}

21
components/hal/esp32s3/include/hal/timer_ll.h
View File

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
hw->hw_timer[timer_num].config.tn_en = en;
}
/**
* @brief Trigger software capture event
*
* @param hw Timer Group register base address
* @param timer_num Timer number in the group
*/
__attribute__((always_inline))
static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tn_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tn_update) {
}
}
/**
* @brief Get counter value
*
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
__attribute__((always_inline))
static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
{
hw->hw_timer[timer_num].update.tn_update = 1;
// Timer register is in a different clock domain from Timer hardware logic
// We need to wait for the update to take effect before fetching the count value
while (hw->hw_timer[timer_num].update.tn_update) {
}
return ((uint64_t)hw->hw_timer[timer_num].hi.tn_hi << 32) | (hw->hw_timer[timer_num].lo.tn_lo);
}

10
components/hal/include/hal/timer_hal.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -45,6 +45,14 @@ void timer_hal_init(timer_hal_context_t *hal, uint32_t group_num, uint32_t timer
*/
void timer_hal_set_counter_value(timer_hal_context_t *hal, uint64_t load_val);
/**
* @brief Trigger a software capture event and then return the captured count value
*
* @param hal Context of the HAL layer
* @return Counter value
*/
uint64_t timer_hal_capture_and_get_counter_value(timer_hal_context_t *hal);
#ifdef __cplusplus
}
#endif

6
components/hal/timer_hal_iram.c
View File

@@ -22,3 +22,9 @@ void timer_hal_set_counter_value(timer_hal_context_t *hal, uint64_t load_val)
// restore the previous reload value
timer_ll_set_reload_value(hal->dev, hal->timer_id, old_reload);
}
uint64_t timer_hal_capture_and_get_counter_value(timer_hal_context_t *hal)
{
timer_ll_trigger_soft_capture(hal->dev, hal->timer_id);
return timer_ll_get_counter_value(hal->dev, hal->timer_id);
}