Merge branch 'refactor/gptimer_software_capture' into 'master'

split gptimer software capture in hal driver

See merge request espressif/esp-idf!19749

components/hal/esp32/include/hal/timer_ll.h

@@ -112,6 +112,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
     hw->hw_timer[timer_num].config.tx_en = en;
 }
 
+/**
+ * @brief Trigger software capture event
+ *
+ * @param hw Timer Group register base address
+ * @param timer_num Timer number in the group
+ */
+__attribute__((always_inline))
+static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
+{
+    hw->hw_timer[timer_num].update.tx_update = 1;
+    // Timer register is in a different clock domain from Timer hardware logic
+    // We need to wait for the update to take effect before fetching the count value
+    while (hw->hw_timer[timer_num].update.tx_update) {
+    }
+}
+
 /**
  * @brief Get counter value
  *
@@ -123,11 +139,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
 __attribute__((always_inline))
 static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
 {
-    hw->hw_timer[timer_num].update.tx_update = 1;
-    // Timer register is in a different clock domain from Timer hardware logic
-    // We need to wait for the update to take effect before fetching the count value
-    while (hw->hw_timer[timer_num].update.tx_update) {
-    }
     return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
 }
 

components/hal/esp32c2/include/hal/timer_ll.h

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
     hw->hw_timer[timer_num].config.tx_en = en;
 }
 
+/**
+ * @brief Trigger software capture event
+ *
+ * @param hw Timer Group register base address
+ * @param timer_num Timer number in the group
+ */
+__attribute__((always_inline))
+static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
+{
+    hw->hw_timer[timer_num].update.tx_update = 1;
+    // Timer register is in a different clock domain from Timer hardware logic
+    // We need to wait for the update to take effect before fetching the count value
+    while (hw->hw_timer[timer_num].update.tx_update) {
+    }
+}
+
 /**
  * @brief Get counter value
  *
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
 __attribute__((always_inline))
 static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
 {
-    hw->hw_timer[timer_num].update.tx_update = 1;
-    // Timer register is in a different clock domain from Timer hardware logic
-    // We need to wait for the update to take effect before fetching the count value
-    while (hw->hw_timer[timer_num].update.tx_update) {
-    }
     return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
 }
 

components/hal/esp32c3/include/hal/timer_ll.h

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
     hw->hw_timer[timer_num].config.tx_en = en;
 }
 
+/**
+ * @brief Trigger software capture event
+ *
+ * @param hw Timer Group register base address
+ * @param timer_num Timer number in the group
+ */
+__attribute__((always_inline))
+static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
+{
+    hw->hw_timer[timer_num].update.tx_update = 1;
+    // Timer register is in a different clock domain from Timer hardware logic
+    // We need to wait for the update to take effect before fetching the count value
+    while (hw->hw_timer[timer_num].update.tx_update) {
+    }
+}
+
 /**
  * @brief Get counter value
  *
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
 __attribute__((always_inline))
 static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
 {
-    hw->hw_timer[timer_num].update.tx_update = 1;
-    // Timer register is in a different clock domain from Timer hardware logic
-    // We need to wait for the update to take effect before fetching the count value
-    while (hw->hw_timer[timer_num].update.tx_update) {
-    }
     return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
 }
 

components/hal/esp32h2/include/hal/timer_ll.h

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
     hw->hw_timer[timer_num].config.tx_en = en;
 }
 
+/**
+ * @brief Trigger software capture event
+ *
+ * @param hw Timer Group register base address
+ * @param timer_num Timer number in the group
+ */
+__attribute__((always_inline))
+static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
+{
+    hw->hw_timer[timer_num].update.tx_update = 1;
+    // Timer register is in a different clock domain from Timer hardware logic
+    // We need to wait for the update to take effect before fetching the count value
+    while (hw->hw_timer[timer_num].update.tx_update) {
+    }
+}
+
 /**
  * @brief Get counter value
  *
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
 __attribute__((always_inline))
 static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
 {
-    hw->hw_timer[timer_num].update.tx_update = 1;
-    // Timer register is in a different clock domain from Timer hardware logic
-    // We need to wait for the update to take effect before fetching the count value
-    while (hw->hw_timer[timer_num].update.tx_update) {
-    }
     return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
 }
 

components/hal/esp32s2/include/hal/timer_ll.h

@@ -116,6 +116,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
     hw->hw_timer[timer_num].config.tx_en = en;
 }
 
+/**
+ * @brief Trigger software capture event
+ *
+ * @param hw Timer Group register base address
+ * @param timer_num Timer number in the group
+ */
+__attribute__((always_inline))
+static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
+{
+    hw->hw_timer[timer_num].update.tx_update = 1;
+    // Timer register is in a different clock domain from Timer hardware logic
+    // We need to wait for the update to take effect before fetching the count value
+    while (hw->hw_timer[timer_num].update.tx_update) {
+    }
+}
+
 /**
  * @brief Get counter value
  *
@@ -127,11 +143,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
 __attribute__((always_inline))
 static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
 {
-    hw->hw_timer[timer_num].update.tx_update = 1;
-    // Timer register is in a different clock domain from Timer hardware logic
-    // We need to wait for the update to take effect before fetching the count value
-    while (hw->hw_timer[timer_num].update.tx_update) {
-    }
     return ((uint64_t) hw->hw_timer[timer_num].hi.tx_hi << 32) | (hw->hw_timer[timer_num].lo.tx_lo);
 }
 

components/hal/esp32s3/include/hal/timer_ll.h

@@ -115,6 +115,22 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
     hw->hw_timer[timer_num].config.tn_en = en;
 }
 
+/**
+ * @brief Trigger software capture event
+ *
+ * @param hw Timer Group register base address
+ * @param timer_num Timer number in the group
+ */
+__attribute__((always_inline))
+static inline void timer_ll_trigger_soft_capture(timg_dev_t *hw, uint32_t timer_num)
+{
+    hw->hw_timer[timer_num].update.tn_update = 1;
+    // Timer register is in a different clock domain from Timer hardware logic
+    // We need to wait for the update to take effect before fetching the count value
+    while (hw->hw_timer[timer_num].update.tn_update) {
+    }
+}
+
 /**
  * @brief Get counter value
  *
@@ -126,11 +142,6 @@ static inline void timer_ll_enable_counter(timg_dev_t *hw, uint32_t timer_num, b
 __attribute__((always_inline))
 static inline uint64_t timer_ll_get_counter_value(timg_dev_t *hw, uint32_t timer_num)
 {
-    hw->hw_timer[timer_num].update.tn_update = 1;
-    // Timer register is in a different clock domain from Timer hardware logic
-    // We need to wait for the update to take effect before fetching the count value
-    while (hw->hw_timer[timer_num].update.tn_update) {
-    }
     return ((uint64_t)hw->hw_timer[timer_num].hi.tn_hi << 32) | (hw->hw_timer[timer_num].lo.tn_lo);
 }
 

components/hal/include/hal/timer_hal.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -45,6 +45,14 @@ void timer_hal_init(timer_hal_context_t *hal, uint32_t group_num, uint32_t timer
  */
 void timer_hal_set_counter_value(timer_hal_context_t *hal, uint64_t load_val);
 
+/**
+ * @brief Trigger a software capture event and then return the captured count value
+ *
+ * @param hal Context of the HAL layer
+ * @return Counter value
+ */
+uint64_t timer_hal_capture_and_get_counter_value(timer_hal_context_t *hal);
+
 #ifdef __cplusplus
 }
 #endif

components/hal/timer_hal_iram.c

@@ -22,3 +22,9 @@ void timer_hal_set_counter_value(timer_hal_context_t *hal, uint64_t load_val)
     // restore the previous reload value
     timer_ll_set_reload_value(hal->dev, hal->timer_id, old_reload);
 }
+
+uint64_t timer_hal_capture_and_get_counter_value(timer_hal_context_t *hal)
+{
+    timer_ll_trigger_soft_capture(hal->dev, hal->timer_id);
+    return timer_ll_get_counter_value(hal->dev, hal->timer_id);
+}