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soc: Remove cache constants from soc.h
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committed by
Angus Gratton
parent
d4c9a45675
commit
0736c91d68
42
components/soc/esp32c3/include/soc/mmu.h
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42
components/soc/esp32c3/include/soc/mmu.h
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@@ -0,0 +1,42 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <stdint.h>
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#include "soc/cache_memory.h"
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Defined for flash mmap */
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#define SOC_MMU_REGIONS_COUNT 1
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#define SOC_MMU_PAGES_PER_REGION 128
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#define SOC_MMU_IROM0_PAGES_START (CACHE_IROM_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_ADDRESS_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) (page) //Always in Flash
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR SOC_IRAM_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE SOC_MMU_IROM0_PAGES_START
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#define SOC_MMU_VADDR0_START_ADDR (SOC_DROM_LOW + (SOC_MMU_DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
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#define SOC_MMU_VADDR1_FIRST_USABLE_ADDR SOC_IROM_LOW
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#ifdef __cplusplus
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}
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#endif
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@@ -262,22 +262,6 @@
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// Start (highest address) of ROM boot stack, only relevant during early boot
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#define SOC_ROM_STACK_START 0x3fcebf10
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/* Defined for flash mmap */
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#define REGIONS_COUNT 1
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#define PAGES_PER_REGION 128
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#define IROM0_PAGES_START (CACHE_IROM_MMU_START / sizeof(uint32_t))
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#define IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t))
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#define DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t))
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#define DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t))
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#define INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define MMU_ADDR_MASK MMU_ADDRESS_MASK
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#define PAGE_IN_FLASH(page) (page) //Always in Flash
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#define DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
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#define PRO_IRAM0_FIRST_USABLE_PAGE IROM0_PAGES_START
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#define VADDR0_START_ADDR (SOC_DROM_LOW + (DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
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#define VADDR1_FIRST_USABLE_ADDR SOC_IROM_LOW
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//interrupt cpu using table, Please see the core-isa.h
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/*************************************************************************************************************
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* Intr num Level Type PRO CPU usage APP CPU uasge
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