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Merge branch 'bugfix/rtc_time_issues' into 'master'

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Fixes for RTC time issues

See merge request !849
This commit is contained in:
Jiang Jiang Jian
2017-06-16 15:29:56 +08:00
parent ff6c0a6cc8 8ccb2a4990
commit 07ccbb8dbc
4 changed files with 69 additions and 20 deletions
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14
components/esp32/include/esp_clk.h
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@@ -33,7 +33,7 @@ void esp_clk_init(void);
/**
* @brief Get the cached calibration value of RTC slow clock
* @brief Get the calibration value of RTC slow clock
*
* The value is in the same format as returned by rtc_clk_cal (microseconds,
* in Q13.19 fixed-point format).
@@ -42,3 +42,15 @@ void esp_clk_init(void);
*/
uint32_t esp_clk_slowclk_cal_get();
/**
* @brief Update the calibration value of RTC slow clock
*
* The value has to be in the same format as returned by rtc_clk_cal (microseconds,
* in Q13.19 fixed-point format).
* This value is used by timekeeping functions (such as gettimeofday) to
* calculate current time based on RTC counter value.
* @param value calibration value obtained using rtc_clk_cal
*/
void esp_clk_slowclk_cal_set(uint32_t value);

7
components/esp32/include/rom/rtc.h
View File

@@ -50,9 +50,9 @@ extern "C" {
* 0x3ff80000(0x400c0000) Fast 8192 deep sleep entry code
*
*************************************************************************************
* Rtc store registers usage
* RTC_CNTL_STORE0_REG
* RTC_CNTL_STORE1_REG
* RTC store registers usage
* RTC_CNTL_STORE0_REG Reserved
* RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value
* RTC_CNTL_STORE2_REG Boot time, low word
* RTC_CNTL_STORE3_REG Boot time, high word
* RTC_CNTL_STORE4_REG External XTAL frequency
@@ -62,6 +62,7 @@ extern "C" {
*************************************************************************************
*/
#define RTC_SLOW_CLK_CAL_REG RTC_CNTL_STORE1_REG
#define RTC_BOOT_TIME_LOW_REG RTC_CNTL_STORE2_REG
#define RTC_BOOT_TIME_HIGH_REG RTC_CNTL_STORE3_REG
#define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG