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wifi/bt coexistence: Fix disabled cache access race when writing to flash

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Moves the ets_timer_arm() / ets_timer_disarm() code paths to RAM

Overhead is 740 bytes of IRAM, 0 bytes DRAM

(For comparison: If all of esp_timer.c is moved to RAM, overhead is 1068 bytes IRAM and 480 bytes DRAM.)
This commit is contained in:
Angus Gratton
2017-10-16 19:16:20 +08:00
committed by Angus Gratton
parent b013f5d490
commit 094cf4d79d
4 changed files with 60 additions and 16 deletions
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2
components/esp32/esp_timer_esp32.c
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@@ -255,7 +255,7 @@ void esp_timer_impl_deinit()
// FIXME: This value is safe for 80MHz APB frequency.
// Should be modified to depend on clock frequency.
uint64_t esp_timer_impl_get_min_period_us()
uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us()
{
return 50;
}