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Rename Kconfig options (components/esp32)

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This commit is contained in:
Roland Dobai
2019-04-30 12:51:55 +02:00
parent d4af5e6fff
commit 0ae53691ba
116 changed files with 773 additions and 701 deletions
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6
components/esp32/test/test_4mpsram.c
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@@ -6,7 +6,7 @@
static const char TAG[] = "test_psram";
#ifdef CONFIG_SPIRAM_SUPPORT
#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
static void test_psram_content()
{
const int test_size = 2048;
@@ -40,7 +40,7 @@ static void test_psram_content()
TEST_CASE("can use spi when not being used by psram", "[psram_4m]")
{
spi_host_device_t host;
#if !CONFIG_SPIRAM_SUPPORT || !CONFIG_SPIRAM_SPEED_80M || CONFIG_SPIRAM_BANKSWITCH_ENABLE
#if !CONFIG_ESP32_SPIRAM_SUPPORT || !CONFIG_SPIRAM_SPEED_80M || CONFIG_SPIRAM_BANKSWITCH_ENABLE
//currently all 8M psram don't need more SPI peripherals
host = -1;
#elif CONFIG_SPIRAM_OCCUPY_HSPI_HOST
@@ -66,7 +66,7 @@ TEST_CASE("can use spi when not being used by psram", "[psram_4m]")
TEST_ASSERT(claim_vspi==true);
}
#ifdef CONFIG_SPIRAM_SUPPORT
#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
test_psram_content();
#endif
}

4
components/esp32/test/test_dport.c
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@@ -107,8 +107,8 @@ TEST_CASE("access DPORT and APB at same time", "[esp32]")
void run_tasks_with_change_freq_cpu(int cpu_freq_mhz)
{
const int uart_num = CONFIG_CONSOLE_UART_NUM;
const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE;
const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
const int uart_baud = CONFIG_ESP_CONSOLE_UART_BAUDRATE;
dport_test_result = false;
apb_test_result = false;
rtc_cpu_freq_config_t old_config;

2
components/esp32/test/test_pm.c
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@@ -122,7 +122,7 @@ TEST_CASE("Automatic light occurs when tasks are suspended", "[pm]")
TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm]")
{
assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
assert(CONFIG_ESP32_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ESP32_ULP_COPROC_RESERVE_MEM option set in menuconfig");
/* Set up GPIO used to wake up RTC */
const int ext1_wakeup_gpio = 25;

6
components/esp32/test/test_sleep.c
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@@ -125,7 +125,7 @@ TEST_CASE("light sleep stress test with periodic esp_timer", "[deepsleep]")
}
#ifdef CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
#define MAX_SLEEP_TIME_ERROR_US 200
#else
#define MAX_SLEEP_TIME_ERROR_US 100
@@ -176,8 +176,8 @@ TEST_CASE("light sleep and frequency switching", "[deepsleep]")
{
#ifndef CONFIG_PM_ENABLE
const int uart_clk_freq = REF_CLK_FREQ;
CLEAR_PERI_REG_MASK(UART_CONF0_REG(CONFIG_CONSOLE_UART_NUM), UART_TICK_REF_ALWAYS_ON);
uart_div_modify(CONFIG_CONSOLE_UART_NUM, (uart_clk_freq << 4) / CONFIG_CONSOLE_UART_BAUDRATE);
CLEAR_PERI_REG_MASK(UART_CONF0_REG(CONFIG_ESP_CONSOLE_UART_NUM), UART_TICK_REF_ALWAYS_ON);
uart_div_modify(CONFIG_ESP_CONSOLE_UART_NUM, (uart_clk_freq << 4) / CONFIG_ESP_CONSOLE_UART_BAUDRATE);
#endif
rtc_cpu_freq_config_t config_xtal, config_default;

4
components/esp32/test/test_spiram_cache_flush.c
View File

@@ -23,7 +23,7 @@ This code tests the interaction between PSRAM and SPI flash routines.
#include "esp_partition.h"
#include "test_utils.h"
#if CONFIG_SPIRAM_SUPPORT
#if CONFIG_ESP32_SPIRAM_SUPPORT
#if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
#define USE_CAPS_ALLOC 1
@@ -181,4 +181,4 @@ IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram]") {
#endif
}
#endif // CONFIG_SPIRAM_SUPPORT
#endif // CONFIG_ESP32_SPIRAM_SUPPORT