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ci: enable previously disabled unit tests

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This commit is contained in:
Marius Vikhammer
2021-02-26 11:44:26 +08:00
committed by bot
parent 617da9f403
commit 0b8ed8d76e
7 changed files with 55 additions and 29 deletions
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7
components/driver/test/test_spi_master.c
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@@ -1050,7 +1050,6 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
#endif //#if !DISABLED_FOR_TARGETS(ESP32C3)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
/********************************************************************************
* Test SPI transaction interval
********************************************************************************/
@@ -1058,8 +1057,8 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
#ifndef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
#define RECORD_TIME_START() do {__t1 = xthal_get_ccount();}while(0)
#define RECORD_TIME_END(p_time) do{__t2 = xthal_get_ccount(); *p_time = (__t2-__t1);}while(0)
#define RECORD_TIME_START() do {__t1 = esp_cpu_get_ccount();}while(0)
#define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_ccount(); *p_time = (__t2-__t1);}while(0)
#ifdef CONFIG_IDF_TARGET_ESP32
#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ)
#elif CONFIG_IDF_TARGET_ESP32S2
@@ -1203,5 +1202,3 @@ TEST_CASE("spi_speed","[spi]")
master_free_device_bus(spi);
}
#endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)