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docs: provide APB clock frequency in api-reference/timers
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@@ -130,8 +130,9 @@ esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num,
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esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload);
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/**
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* @brief Set hardware timer source clock divider. Timer groups clock are divider from APB clock.
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*
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* @brief Set hardware divider of the source clock to the timer group.
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* By default, the source clock is APB clock running at 80 MHz.
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* For more information, please check Chapter Reset and Clock in Chip Technical Reference Manual.
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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* @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
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* @param divider Timer clock divider value. The divider's range is from from 2 to 65536.
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