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change(gptimer): optimize the registers to be backup
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@@ -40,41 +40,36 @@ const regdma_entries_config_t tg0_timer_regdma_entries[] = {
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[0] = {
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.config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x00),
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TIMG_T0UPDATE_REG(0), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// backup stage: wait for the capture done
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[1] = {
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.config = REGDMA_LINK_WAIT_INIT(REGDMA_TG0_TIMER_LINK(0x01),
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TIMG_T0UPDATE_REG(0), 0x0, TIMG_T0_UPDATE_M, 0, 1),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// backup stage: save the captured counter value
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// restore stage: store the captured counter value to the loader register
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[2] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x02),
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TIMG_T0LO_REG(0), TIMG_T0LOADLO_REG(0), 2, 0, 0),
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.owner = TIMG_RETENTION_ENTRY
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},
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[3] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x03),
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TIMG_T0HI_REG(0), TIMG_T0LOADHI_REG(0), 2, 0, 0),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// restore stage: trigger a soft reload, so the timer can continue from where it was backed up
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[4] = {
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.config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x04),
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[3] = {
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.config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x03),
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TIMG_T0LOAD_REG(0), 0x1, TIMG_T0_LOAD_M, 1, 0),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// backup stage: save other configuration and status registers
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// restore stage: restore the configuration and status registers
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[5] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x05),
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[4] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x04),
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TIMG_T0CONFIG_REG(0), TIMG_T0CONFIG_REG(0),
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TG_TIMER_RETENTION_REGS_CNT, 0, 0,
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tg_timer_regs_map[0], tg_timer_regs_map[1],
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tg_timer_regs_map[2], tg_timer_regs_map[3]),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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};
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@@ -83,50 +78,47 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = {
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[0] = {
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.config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x00),
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TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// backup stage: wait for the capture done
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[1] = {
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.config = REGDMA_LINK_WAIT_INIT(REGDMA_TG1_TIMER_LINK(0x01),
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TIMG_T0UPDATE_REG(1), 0x0, TIMG_T0_UPDATE_M, 0, 1),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// backup stage: save the captured counter value
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// restore stage: store the captured counter value to the loader register
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[2] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x02),
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TIMG_T0LO_REG(1), TIMG_T0LOADLO_REG(1), 2, 0, 0),
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.owner = TIMG_RETENTION_ENTRY
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},
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[3] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x03),
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TIMG_T0HI_REG(1), TIMG_T0LOADHI_REG(1), 2, 0, 0),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// restore stage: trigger a soft reload, so the timer can continue from where it was backed up
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[4] = {
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.config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x04),
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[3] = {
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.config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x03),
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TIMG_T0LOAD_REG(1), 0x1, TIMG_T0_LOAD_M, 1, 0),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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// backup stage: save other configuration and status registers
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// restore stage: restore the configuration and status registers
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[5] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x05),
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[4] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x04),
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TIMG_T0CONFIG_REG(1), TIMG_T0CONFIG_REG(1),
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TG_TIMER_RETENTION_REGS_CNT, 0, 0,
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tg_timer_regs_map[0], tg_timer_regs_map[1],
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tg_timer_regs_map[2], tg_timer_regs_map[3]),
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.owner = TIMG_RETENTION_ENTRY
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.owner = ENTRY(0) | ENTRY(2)
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},
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};
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const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS] = {
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[0] = {
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.module = SLEEP_RETENTION_MODULE_TG0_TIMER,
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.regdma_entry_array = tg0_timer_regdma_entries,
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.array_size = ARRAY_SIZE(tg0_timer_regdma_entries)
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},
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[1] = {
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.module = SLEEP_RETENTION_MODULE_TG1_TIMER,
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.regdma_entry_array = tg1_timer_regdma_entries,
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.array_size = ARRAY_SIZE(tg1_timer_regdma_entries)
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},
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