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refactor(hal): Refactor the APM LL/HAL APIs

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This commit is contained in:
Laukik Hase
2025-04-17 17:19:13 +05:30
parent d835854c8f
commit 0d8a1f5427
24 changed files with 3397 additions and 2056 deletions
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4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
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@@ -1299,6 +1299,10 @@ config SOC_APM_LP_APM0_SUPPORTED
bool
default y
config SOC_APM_SUPPORT_LP_TEE_CTRL
bool
default y
config SOC_CRYPTO_DPA_PROTECTION_SUPPORTED
bool
default y

41
components/soc/esp32c6/include/soc/apm_defs.h Normal file
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@@ -0,0 +1,41 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_bit_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Number of paths for each supported APM controller */
#define APM_CTRL_HP_APM_PATH_NUM (4)
#define APM_CTRL_LP_APM0_PATH_NUM (1)
#define APM_CTRL_LP_APM_PATH_NUM (2)
/* Number of regions for each supported APM controller */
#define APM_CTRL_HP_APM_REGION_NUM (16)
#define APM_CTRL_LP_APM0_REGION_NUM (4)
#define APM_CTRL_LP_APM_REGION_NUM (4)
/* Register offset for TEE mode control */
#define APM_TEE_MODE_CTRL_OFFSET (0x04)
/* Register offset between region bound address registers */
#define APM_REGION_ADDR_OFFSET (0x0C)
/* Register offset between region pms attribute registers */
#define APM_REGION_PMS_ATTR_OFFSET (0x0C)
/* Register offset between exception info registers */
#define APM_EXCP_INFO_OFFSET (0x10)
/* Bit to clear exception status */
#define APM_EXCP_STATUS_CLR_BIT (BIT(0))
/* APM controller masters mask */
#define APM_MASTER_MASK_ALL (0x03CD007FU)
#ifdef __cplusplus
}
#endif

7
components/soc/esp32c6/include/soc/soc_caps.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -498,8 +498,9 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
/*-------------------------- APM CAPS ----------------------------------------*/
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
#define SOC_APM_LP_APM0_SUPPORTED 1 /*!< Support for LP APM0 control filter */
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
#define SOC_APM_LP_APM0_SUPPORTED 1 /*!< Support for LP APM0 control filter */
#define SOC_APM_SUPPORT_LP_TEE_CTRL 1 /*!< Support for LP TEE controller */
/*------------------------ Anti DPA (Security) CAPS --------------------------*/
#define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1