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Merge branch 'feature/support_isp_hisp_p4' into 'master'

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feature(isp): Add ISP histogram support for esp32p4

Closes IDF-10192

See merge request espressif/esp-idf!31342
This commit is contained in:
Gao Xu
2024-08-28 09:13:43 +08:00
parent 005844421d c3155c39d1
commit 0e4464c363
18 changed files with 1034 additions and 268 deletions
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20
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
View File

@@ -927,6 +927,26 @@ config SOC_ISP_SHARPEN_M_FREQ_COEF_RES_BITS
int
default 24
config SOC_ISP_HIST_CTLR_NUMS
int
default 1
config SOC_ISP_HIST_BLOCK_X_NUMS
int
default 5
config SOC_ISP_HIST_BLOCK_Y_NUMS
int
default 5
config SOC_ISP_HIST_SEGMENT_NUMS
int
default 16
config SOC_ISP_HIST_INTERVAL_NUMS
int
default 15
config SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
bool
default y

285
components/soc/esp32p4/include/soc/isp_struct.h
View File

@@ -1821,6 +1821,25 @@ typedef union {
uint32_t val;
} isp_hist_size_reg_t;
/** Type of hist_seg register
* histogram bin control register
*/
typedef union {
struct {
/** hist_seg: R/W;
* default:
* 16, 32, 48, 64,
* 80, 96, 112, 128,
* 144, 160, 176, 192,
* 208, 224, 240
* this field configures threshold of histogram
*/
uint8_t hist_seg_b[4];
};
uint32_t val;
} isp_hist_seg_reg_t;
/** Type of hist_seg0 register
* histogram bin control register 0
*/
@@ -1918,6 +1937,20 @@ typedef union {
uint32_t val;
} isp_hist_seg3_reg_t;
/** Type of hist_weight register
* histogram sub-window weight register 0
*/
typedef union {
struct {
/** histogram weight : RO; bitpos: [31:0];
* weight[12] default 232, others default 1
* this field represents the weight of histogram subwindow, sum of all weight should be 256
*/
uint8_t hist_weight_b[4];
};
uint32_t val;
} isp_hist_weight_reg_t;
/** Type of hist_weight0 register
* histogram sub-window weight register 0
*/
@@ -2584,229 +2617,19 @@ typedef union {
uint32_t val;
} isp_blc_mean_reg_t;
/** Type of hist_bin0 register
* result of histogram bin 0
/** Type of hist_bin register
* result of histogram bin n
*/
typedef union {
struct {
/** hist_bin_0 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 0
/** hist_bin_n : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin n
*/
uint32_t hist_bin_0:17;
uint32_t hist_bin_n:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin0_reg_t;
/** Type of hist_bin1 register
* result of histogram bin 1
*/
typedef union {
struct {
/** hist_bin_1 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 1
*/
uint32_t hist_bin_1:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin1_reg_t;
/** Type of hist_bin2 register
* result of histogram bin 2
*/
typedef union {
struct {
/** hist_bin_2 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 2
*/
uint32_t hist_bin_2:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin2_reg_t;
/** Type of hist_bin3 register
* result of histogram bin 3
*/
typedef union {
struct {
/** hist_bin_3 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 3
*/
uint32_t hist_bin_3:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin3_reg_t;
/** Type of hist_bin4 register
* result of histogram bin 4
*/
typedef union {
struct {
/** hist_bin_4 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 4
*/
uint32_t hist_bin_4:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin4_reg_t;
/** Type of hist_bin5 register
* result of histogram bin 5
*/
typedef union {
struct {
/** hist_bin_5 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 5
*/
uint32_t hist_bin_5:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin5_reg_t;
/** Type of hist_bin6 register
* result of histogram bin 6
*/
typedef union {
struct {
/** hist_bin_6 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 6
*/
uint32_t hist_bin_6:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin6_reg_t;
/** Type of hist_bin7 register
* result of histogram bin 7
*/
typedef union {
struct {
/** hist_bin_7 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 7
*/
uint32_t hist_bin_7:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin7_reg_t;
/** Type of hist_bin8 register
* result of histogram bin 8
*/
typedef union {
struct {
/** hist_bin_8 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 8
*/
uint32_t hist_bin_8:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin8_reg_t;
/** Type of hist_bin9 register
* result of histogram bin 9
*/
typedef union {
struct {
/** hist_bin_9 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 9
*/
uint32_t hist_bin_9:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin9_reg_t;
/** Type of hist_bin10 register
* result of histogram bin 10
*/
typedef union {
struct {
/** hist_bin_10 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 10
*/
uint32_t hist_bin_10:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin10_reg_t;
/** Type of hist_bin11 register
* result of histogram bin 11
*/
typedef union {
struct {
/** hist_bin_11 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 11
*/
uint32_t hist_bin_11:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin11_reg_t;
/** Type of hist_bin12 register
* result of histogram bin 12
*/
typedef union {
struct {
/** hist_bin_12 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 12
*/
uint32_t hist_bin_12:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin12_reg_t;
/** Type of hist_bin13 register
* result of histogram bin 13
*/
typedef union {
struct {
/** hist_bin_13 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 13
*/
uint32_t hist_bin_13:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin13_reg_t;
/** Type of hist_bin14 register
* result of histogram bin 14
*/
typedef union {
struct {
/** hist_bin_14 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 14
*/
uint32_t hist_bin_14:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin14_reg_t;
/** Type of hist_bin15 register
* result of histogram bin 15
*/
typedef union {
struct {
/** hist_bin_15 : RO; bitpos: [16:0]; default: 0;
* this field represents result of histogram bin 15
*/
uint32_t hist_bin_15:17;
uint32_t reserved_17:15;
};
uint32_t val;
} isp_hist_bin15_reg_t;
} isp_hist_binn_reg_t;
/** Type of rdn_eco_cs register
* rdn eco cs register
@@ -3437,33 +3260,9 @@ typedef struct {
volatile isp_hist_coeff_reg_t hist_coeff;
volatile isp_hist_offs_reg_t hist_offs;
volatile isp_hist_size_reg_t hist_size;
volatile isp_hist_seg0_reg_t hist_seg0;
volatile isp_hist_seg1_reg_t hist_seg1;
volatile isp_hist_seg2_reg_t hist_seg2;
volatile isp_hist_seg3_reg_t hist_seg3;
volatile isp_hist_weight0_reg_t hist_weight0;
volatile isp_hist_weight1_reg_t hist_weight1;
volatile isp_hist_weight2_reg_t hist_weight2;
volatile isp_hist_weight3_reg_t hist_weight3;
volatile isp_hist_weight4_reg_t hist_weight4;
volatile isp_hist_weight5_reg_t hist_weight5;
volatile isp_hist_weight6_reg_t hist_weight6;
volatile isp_hist_bin0_reg_t hist_bin0;
volatile isp_hist_bin1_reg_t hist_bin1;
volatile isp_hist_bin2_reg_t hist_bin2;
volatile isp_hist_bin3_reg_t hist_bin3;
volatile isp_hist_bin4_reg_t hist_bin4;
volatile isp_hist_bin5_reg_t hist_bin5;
volatile isp_hist_bin6_reg_t hist_bin6;
volatile isp_hist_bin7_reg_t hist_bin7;
volatile isp_hist_bin8_reg_t hist_bin8;
volatile isp_hist_bin9_reg_t hist_bin9;
volatile isp_hist_bin10_reg_t hist_bin10;
volatile isp_hist_bin11_reg_t hist_bin11;
volatile isp_hist_bin12_reg_t hist_bin12;
volatile isp_hist_bin13_reg_t hist_bin13;
volatile isp_hist_bin14_reg_t hist_bin14;
volatile isp_hist_bin15_reg_t hist_bin15;
volatile isp_hist_seg_reg_t hist_seg[4];
volatile isp_hist_weight_reg_t hist_weight[7];
volatile isp_hist_binn_reg_t hist_binn[16];
volatile isp_mem_aux_ctrl_0_reg_t mem_aux_ctrl_0;
volatile isp_mem_aux_ctrl_1_reg_t mem_aux_ctrl_1;
volatile isp_mem_aux_ctrl_2_reg_t mem_aux_ctrl_2;

5
components/soc/esp32p4/include/soc/soc_caps.h
View File

@@ -357,6 +357,11 @@
#define SOC_ISP_SHARPEN_M_FREQ_COEF_INT_BITS 3
#define SOC_ISP_SHARPEN_M_FREQ_COEF_DEC_BITS 5
#define SOC_ISP_SHARPEN_M_FREQ_COEF_RES_BITS 24
#define SOC_ISP_HIST_CTLR_NUMS 1U
#define SOC_ISP_HIST_BLOCK_X_NUMS 5
#define SOC_ISP_HIST_BLOCK_Y_NUMS 5
#define SOC_ISP_HIST_SEGMENT_NUMS 16
#define SOC_ISP_HIST_INTERVAL_NUMS 15
/*-------------------------- LEDC CAPS ---------------------------------------*/
#define SOC_LEDC_SUPPORT_PLL_DIV_CLOCK (1)