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https://github.com/espressif/esp-idf.git
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efuse(esp32-c6): Update efuse_table and rs coding error func
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -9,7 +9,7 @@
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#include <assert.h>
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#include "esp_efuse_table.h"
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// md5_digest_table 5b3b6e026d28aacca6dc3b96be8bd280
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// md5_digest_table e3b1264d26cc94f387d58e4ba9a3677c
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// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
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// If you want to change some fields, you need to change esp_efuse_table.csv file
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// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
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@@ -191,6 +191,10 @@ static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
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{EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function,
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};
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static const esp_efuse_desc_t DIS_SPI_DOWNLOAD_MSPI[] = {
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{EFUSE_BLK0, 45, 1}, // Represents whether the SPI0 controller is disabled in boot_mode_download,
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};
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static const esp_efuse_desc_t DIS_TWAI[] = {
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{EFUSE_BLK0, 46, 1}, // Disable TWAI function,
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};
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@@ -200,25 +204,17 @@ static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = {
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};
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static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
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{EFUSE_BLK0, 48, 3}, // Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.,
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{EFUSE_BLK0, 48, 3}, // Set these bits to soft disable JTAG (odd number 1 means disable). JTAG can be enabled in HMAC module.,
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};
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static const esp_efuse_desc_t DIS_PAD_JTAG[] = {
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{EFUSE_BLK0, 51, 1}, // Disable JTAG in the hard way. JTAG is disabled permanently.,
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{EFUSE_BLK0, 51, 1}, // Hard disable JTAG. JTAG is disabled permanently.,
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};
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static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
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{EFUSE_BLK0, 52, 1}, // Disable flash encryption when in download boot modes.,
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};
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static const esp_efuse_desc_t USB_DREFH[] = {
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{EFUSE_BLK0, 53, 2}, // Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.,
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};
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static const esp_efuse_desc_t USB_DREFL[] = {
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{EFUSE_BLK0, 55, 2}, // Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.,
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};
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static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
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{EFUSE_BLK0, 57, 1}, // Exchange D+ D- pins,
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};
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@@ -272,7 +268,11 @@ static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
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};
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static const esp_efuse_desc_t SEC_DPA_LEVEL[] = {
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{EFUSE_BLK0, 112, 2}, // Configures the clock random divide mode to determine the spa secure level,
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{EFUSE_BLK0, 112, 2}, // Configures the clock random divide mode to determine the DPA security level,
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};
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static const esp_efuse_desc_t CRYPT_DPA_ENABLE[] = {
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{EFUSE_BLK0, 115, 1}, // Represents whether defense against DPA attack is enabled,
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};
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static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
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@@ -295,16 +295,16 @@ static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
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{EFUSE_BLK0, 129, 1}, // Disable direct boot mode,
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};
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static const esp_efuse_desc_t DIS_USB_PRINT[] = {
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{EFUSE_BLK0, 130, 1}, // Disable USB Print,
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static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
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{EFUSE_BLK0, 130, 1}, // Represents whether print from USB-Serial-JTAG during ROM boot is disabled,
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};
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static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
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{EFUSE_BLK0, 132, 1}, // Disable download through USB,
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static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
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{EFUSE_BLK0, 132, 1}, // Represents whether the USB-Serial-JTAG download func- tion is disabled,
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};
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static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
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{EFUSE_BLK0, 133, 1}, // Enable security download mode,
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{EFUSE_BLK0, 133, 1}, // Enable secure download mode,
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};
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static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
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@@ -319,6 +319,10 @@ static const esp_efuse_desc_t SECURE_VERSION[] = {
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{EFUSE_BLK0, 142, 16}, // Secure version for anti-rollback,
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};
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static const esp_efuse_desc_t SECURE_BOOT_DISABLE_FAST_WAKE[] = {
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{EFUSE_BLK0, 158, 1}, // Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled,
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};
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static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK0, 160, 1}, // Disables check of wafer version major,
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};
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@@ -729,6 +733,11 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DIS_SPI_DOWNLOAD_MSPI[] = {
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&DIS_SPI_DOWNLOAD_MSPI[0], // Represents whether the SPI0 controller is disabled in boot_mode_download
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DIS_TWAI[] = {
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&DIS_TWAI[0], // Disable TWAI function
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NULL
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@@ -740,12 +749,12 @@ const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = {
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};
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const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
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&SOFT_DIS_JTAG[0], // Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
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&SOFT_DIS_JTAG[0], // Set these bits to soft disable JTAG (odd number 1 means disable). JTAG can be enabled in HMAC module.
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = {
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&DIS_PAD_JTAG[0], // Disable JTAG in the hard way. JTAG is disabled permanently.
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&DIS_PAD_JTAG[0], // Hard disable JTAG. JTAG is disabled permanently.
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NULL
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};
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@@ -754,16 +763,6 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_USB_DREFH[] = {
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&USB_DREFH[0], // Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_USB_DREFL[] = {
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&USB_DREFL[0], // Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
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&USB_EXCHG_PINS[0], // Exchange D+ D- pins
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NULL
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@@ -830,7 +829,12 @@ const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
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};
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const esp_efuse_desc_t* ESP_EFUSE_SEC_DPA_LEVEL[] = {
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&SEC_DPA_LEVEL[0], // Configures the clock random divide mode to determine the spa secure level
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&SEC_DPA_LEVEL[0], // Configures the clock random divide mode to determine the DPA security level
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_CRYPT_DPA_ENABLE[] = {
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&CRYPT_DPA_ENABLE[0], // Represents whether defense against DPA attack is enabled
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NULL
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};
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@@ -859,18 +863,18 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_PRINT[] = {
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&DIS_USB_PRINT[0], // Disable USB Print
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const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
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&DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Represents whether print from USB-Serial-JTAG during ROM boot is disabled
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
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&DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
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const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
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&DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Represents whether the USB-Serial-JTAG download func- tion is disabled
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
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&ENABLE_SECURITY_DOWNLOAD[0], // Enable security download mode
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&ENABLE_SECURITY_DOWNLOAD[0], // Enable secure download mode
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NULL
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};
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@@ -889,6 +893,11 @@ const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_DISABLE_FAST_WAKE[] = {
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&SECURE_BOOT_DISABLE_FAST_WAKE[0], // Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[] = {
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&DISABLE_WAFER_VERSION_MAJOR[0], // Disables check of wafer version major
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NULL
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