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fix(ci): enable gpio, uart target tests on esp32p4

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This commit is contained in:
Song Ruo Jing
2024-08-01 16:28:21 +08:00
parent deb18eb487
commit 1171c3c281
7 changed files with 19 additions and 20 deletions
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8
components/esp_driver_gpio/test_apps/.build-test-rules.yml
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@@ -1,14 +1,6 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_driver_gpio/test_apps:
disable:
- if: IDF_TARGET in ["esp32c61"]
temporary: true
reason: not support yet # TODO: [esp32c61] IDF-9877
disable_test:
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: test not pass, should be re-enable # TODO: [ESP32P4] IDF-8968
depends_components:
- esp_driver_gpio

4
components/esp_driver_gpio/test_apps/gpio/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |

8
components/esp_driver_gpio/test_apps/gpio/main/test_rtcio.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -122,7 +122,7 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
#elif CONFIG_IDF_TARGET_ESP32P4
// Has no input-only rtcio pins, all pins support pull-up/down
#define RTCIO_SUPPORT_PU_PD(num) 1
#define TEST_GPIO_PIN_COUNT 16
#define TEST_GPIO_PIN_COUNT 14
const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_0, //GPIO0
GPIO_NUM_1, //GPIO1
@@ -131,8 +131,8 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_4, //GPIO4
GPIO_NUM_5, //GPIO5
GPIO_NUM_6, //GPIO6
GPIO_NUM_7, //GPIO7
GPIO_NUM_8, //GPIO8
// GPIO_NUM_7, //GPIO7 // Workaround: IO7 is pullup outside on ESP32P4 Core Board Runner
// GPIO_NUM_8, //GPIO8 // Workaround: IO8 is pullup outside on ESP32P4 Core Board Runner
GPIO_NUM_9, //GPIO9
GPIO_NUM_10, //GPIO10
GPIO_NUM_11, //GPIO11

2
components/esp_driver_gpio/test_apps/gpio/pytest_gpio.py
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@@ -9,7 +9,6 @@ CONFIGS = [
]
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='esp32p4 support TBD')
@pytest.mark.supported_targets
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
@@ -22,6 +21,7 @@ def test_gpio(dut: IdfDut) -> None:
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.esp32c5
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)