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Merge branch 'feature/support_adc_calibration_s3' into 'master'
adc: support adc calibration on s3 Closes IDF-1950, IDF-3730, and IDF-3036 See merge request espressif/esp-idf!15031
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@@ -36,12 +36,29 @@
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#define SOC_APPCPU_HAS_CLOCK_GATING_BUG (1)
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/*-------------------------- ADC CAPS ----------------------------------------*/
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#define SOC_ADC_PERIPH_NUM (2)
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#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (10)
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#define SOC_ADC_MAX_CHANNEL_NUM (10)
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#define SOC_ADC_MAX_BITWIDTH (12)
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#define SOC_ADC_SUPPORT_RTC_CTRL (1)
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#define SOC_ADC_ARBITER_SUPPORTED (1)
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/*!< SAR ADC Module*/
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#define SOC_ADC_RTC_CTRL_SUPPORTED 1
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#define SOC_ADC_ARBITER_SUPPORTED 1
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#define SOC_ADC_FILTER_SUPPORTED 1
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#define SOC_ADC_MONITOR_SUPPORTED 1
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#define SOC_ADC_PERIPH_NUM (2)
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#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (10)
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#define SOC_ADC_MAX_CHANNEL_NUM (10)
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/*!< Digital */
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#define SOC_ADC_DIGI_CONTROLLER_NUM (2)
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#define SOC_ADC_PATT_LEN_MAX (24) //Two pattern table, each contains 12 items. Each item takes 1 byte
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#define SOC_ADC_DIGI_MAX_BITWIDTH (13)
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/*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095 */
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#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
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#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
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/*!< RTC */
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#define SOC_ADC_MAX_BITWIDTH (12)
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/*!< Calibration */
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#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
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/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
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#define SOC_APB_BACKUP_DMA (1)
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