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https://github.com/espressif/esp-idf.git
synced 2025-08-12 13:27:36 +00:00
soc: add reset reasons in soc component
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@@ -13,23 +13,21 @@
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#include "esp_rom_sys.h"
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#include "esp_rom_uart.h"
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#include "sdkconfig.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "soc/dport_reg.h"
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#include "esp32/rom/cache.h"
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#include "esp32/rom/spi_flash.h"
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#include "esp32/rom/rtc.h"
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#include "esp32/rom/secure_boot.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/cache.h"
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#include "esp32s2/rom/spi_flash.h"
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#include "esp32s2/rom/rtc.h"
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#include "esp32s2/rom/secure_boot.h"
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#include "soc/extmem_reg.h"
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#include "soc/cache_memory.h"
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/cache.h"
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#include "esp32s3/rom/spi_flash.h"
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#include "esp32s3/rom/rtc.h"
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#include "esp32s3/rom/secure_boot.h"
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#include "soc/extmem_reg.h"
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#include "soc/cache_memory.h"
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@@ -39,7 +37,6 @@
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#include "esp32c3/rom/ets_sys.h"
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#include "esp32c3/rom/spi_flash.h"
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#include "esp32c3/rom/crc.h"
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#include "esp32c3/rom/rtc.h"
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#include "esp32c3/rom/uart.h"
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#include "esp32c3/rom/gpio.h"
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#include "esp32c3/rom/secure_boot.h"
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@@ -51,7 +48,6 @@
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#include "esp32h2/rom/ets_sys.h"
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#include "esp32h2/rom/spi_flash.h"
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#include "esp32h2/rom/crc.h"
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#include "esp32h2/rom/rtc.h"
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#include "esp32h2/rom/uart.h"
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#include "esp32h2/rom/gpio.h"
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#include "esp32h2/rom/secure_boot.h"
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@@ -69,7 +65,6 @@
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#include "soc/rtc_periph.h"
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#include "soc/timer_periph.h"
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#include "sdkconfig.h"
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#include "esp_image_format.h"
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#include "esp_secure_boot.h"
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#include "esp_flash_encrypt.h"
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@@ -456,7 +451,7 @@ static void set_actual_ota_seq(const bootloader_state_t *bs, int index)
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#ifdef CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP
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void bootloader_utility_load_boot_image_from_deep_sleep(void)
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{
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if (rtc_get_reset_reason(0) == DEEPSLEEP_RESET) {
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if (esp_rom_get_reset_reason(0) == RESET_REASON_CORE_DEEP_SLEEP) {
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esp_partition_pos_t *partition = bootloader_common_get_rtc_retain_mem_partition();
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if (partition != NULL) {
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esp_image_metadata_t image_data;
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