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soc: add reset reasons in soc component

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This commit is contained in:
morris
2021-07-13 10:45:06 +08:00
parent a68fd59b02
commit 1560d6f1ba
47 changed files with 624 additions and 314 deletions
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11
components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
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@@ -4,6 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <string.h>
#include "sdkconfig.h"
#include "bootloader_common.h"
#include "soc/efuse_reg.h"
@@ -23,7 +24,6 @@
#include "esp_rom_sys.h"
#include "esp32s2/rom/cache.h"
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/rtc.h"
#include "esp_attr.h"
#include "esp_log.h"
@@ -35,7 +35,6 @@
#include "soc/extmem_reg.h"
#include "soc/rtc.h"
#include "soc/spi_periph.h"
#include <string.h>
#include "esp_efuse.h"
static const char *TAG = "boot.esp32s2";
@@ -256,11 +255,9 @@ static void wdt_reset_info_dump(int cpu)
static void bootloader_check_wdt_reset(void)
{
int wdt_rst = 0;
RESET_REASON rst_reas[2];
rst_reas[0] = rtc_get_reset_reason(0);
if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET ||
rst_reas[0] == TG0WDT_CPU_RESET || rst_reas[0] == TG1WDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) {
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
wdt_rst = 1;
}