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Merge branch 'docs/uhci_programming_guide' into 'master'

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docs(uhci): Added implementation for uart-dma (uhci) programming guide

See merge request espressif/esp-idf!38663
This commit is contained in:
C.S.M
2025-05-16 17:26:26 +08:00
parent eb81a853fb 093db55bf4
commit 1637e27ae3
8 changed files with 622 additions and 4 deletions
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4
components/esp_driver_uart/include/driver/uhci.h
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@@ -22,8 +22,8 @@ typedef struct {
uart_port_t uart_port; /*!< UART port that connect to UHCI controller */
size_t tx_trans_queue_depth; /*!< Depth of internal transfer queue, increase this value can support more transfers pending in the background */
size_t max_transmit_size; /*!< Maximum transfer size in one transaction, in bytes. This decides the number of DMA nodes will be used for each transaction */
size_t max_receive_internal_mem; /*!< Maximum transfer size in one transaction, in bytes. Each DMA node can point to a maximum of 4096 bytes. This value determines the number of DMA nodes used for each transaction. When your transfer size is large enough, it is recommended to set this value greater than 4096 to facilitate efficient ping-pong operations, such as 10 * 1024. */
size_t dma_burst_size; /*!< DMA burst size, in bytes */
size_t max_receive_internal_mem; /*!< Internal DMA usage memory. Each DMA node can point to a maximum of x bytes (depends on chip). This value determines the number of DMA nodes used for each transaction. When your transfer size is large enough, it is recommended to set this value greater than x to facilitate efficient ping-pong operations, such as 2 * x. */
size_t dma_burst_size; /*!< DMA burst size, in bytes. Set to 0 to disable data burst. Otherwise, use a power of 2. */
size_t max_packet_receive; /*!< Max receive size, auto stop receiving after reach this value, only valid when `length_eof` set true */
struct {

1
components/esp_driver_uart/src/uhci.c
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@@ -203,7 +203,6 @@ static esp_err_t uhci_gdma_initialize(uhci_controller_handle_t uhci_ctrl, const
// Initialize DMA RX channel
gdma_channel_alloc_config_t rx_alloc_config = {
.direction = GDMA_CHANNEL_DIRECTION_RX,
.sibling_chan = uhci_ctrl->tx_dir.dma_chan,
#if CONFIG_UHCI_ISR_CACHE_SAFE
.flags.isr_cache_safe = true,
#endif