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change(freertos/idf): Make v10.5.1 the default kernel

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This commit makes v10.5.1 the default FreeRTOS kernel in ESP-IDF by removing
the CONFIG_FREERTOS_USE_KERNEL_10_5_1 option and v10.4.3 specific code
blocks.
This commit is contained in:
Darian Leung
2023-09-26 17:47:16 +08:00
parent 2025a77dd6
commit 16ccb31d33
14 changed files with 126 additions and 260 deletions
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15
components/freertos/FreeRTOS-Kernel/portable/riscv/include/freertos/portmacro.h
View File

@@ -444,10 +444,13 @@ void vPortTCBPreDeleteHook( void *pxTCB );
* - Maps to forward declared functions
* ------------------------------------------------------------------------------------------------------------------ */
#if CONFIG_FREERTOS_USE_KERNEL_10_5_1
#define portGET_CORE_ID() xPortGetCoreID()
#define portYIELD_CORE( x ) vPortYieldOtherCore( x )
#endif
// ----------------------- System --------------------------
#if ( configNUMBER_OF_CORES > 1 )
#define portGET_CORE_ID() xPortGetCoreID()
#else /* configNUMBER_OF_CORES > 1 */
#define portGET_CORE_ID() ((BaseType_t) 0);
#endif /* configNUMBER_OF_CORES > 1 */
// --------------------- Interrupts ------------------------
@@ -560,6 +563,10 @@ void vPortTCBPreDeleteHook( void *pxTCB );
*/
#define portYIELD_WITHIN_API() portYIELD()
#if ( configNUMBER_OF_CORES > 1 )
#define portYIELD_CORE( xCoreID ) vPortYieldOtherCore( xCoreID )
#endif /* configNUMBER_OF_CORES > 1 */
// ------------------- Hook Functions ----------------------
#define portSUPPRESS_TICKS_AND_SLEEP(idleTime) vApplicationSleep(idleTime)

35
components/freertos/FreeRTOS-Kernel/portable/riscv/portasm.S
View File

@@ -8,12 +8,7 @@
#include "freertos/FreeRTOSConfig.h"
#include "soc/soc_caps.h"
#if CONFIG_FREERTOS_USE_KERNEL_10_5_1
#define pxCurrentTCB pxCurrentTCBs
.extern pxCurrentTCBs
#else
.extern pxCurrentTCB
#endif
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
#include "esp_private/hw_stack_guard.h"
@@ -22,7 +17,7 @@
.global port_uxInterruptNesting
.global port_xSchedulerRunning
.global xIsrStackTop
.global pxCurrentTCB
.global pxCurrentTCBs
.global vTaskSwitchContext
.global xPortSwitchFlag
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
@@ -38,7 +33,7 @@
/**
* This function makes the RTOS aware about an ISR entering. It takes the
* current task stack pointer and places it into the pxCurrentTCB.
* current task stack pointer and places it into the pxCurrentTCBs.
* It then loads the ISR stack into sp.
* TODO: ISR nesting code improvements ?
* In the routines below, let's use a0-a5 registers to let the compiler generate
@@ -75,18 +70,18 @@ rtos_int_enter:
ESP_HW_STACK_GUARD_MONITOR_STOP_CUR_CORE a0 a1
#endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */
/* Save the current sp in pxCurrentTCB[coreID] and load the ISR stack on to sp */
/* Save the current sp in pxCurrentTCBs[coreID] and load the ISR stack on to sp */
#if ( configNUM_CORES > 1 )
la a0, pxCurrentTCB /* a0 = &pxCurrentTCB */
add a0, a0, a5 /* a0 = &pxCurrentTCB[coreID] // a5 already contains coreID * 4 */
lw a0, (a0) /* a0 = pxCurrentTCB[coreID] */
sw sp, 0(a0) /* pxCurrentTCB[coreID] = sp */
la a0, pxCurrentTCBs /* a0 = &pxCurrentTCBs */
add a0, a0, a5 /* a0 = &pxCurrentTCBs[coreID] // a5 already contains coreID * 4 */
lw a0, (a0) /* a0 = pxCurrentTCBs[coreID] */
sw sp, 0(a0) /* pxCurrentTCBs[coreID] = sp */
la a0, xIsrStackTop /* a0 = &xIsrStackTop */
add a0, a0, a5 /* a0 = &xIsrStackTop[coreID] // a5 already contains coreID * 4 */
lw sp, (a0) /* sp = xIsrStackTop[coreID] */
#else
lw a0, pxCurrentTCB /* a0 = pxCurrentTCB */
sw sp, 0(a0) /* pxCurrentTCB[0] = sp */
lw a0, pxCurrentTCBs /* a0 = pxCurrentTCBs */
sw sp, 0(a0) /* pxCurrentTCBs[0] = sp */
lw sp, xIsrStackTop /* sp = xIsrStackTop */
#endif /* ( configNUM_CORES > 1 ) */
@@ -180,20 +175,20 @@ no_switch:
/* Recover the stack of next task and prepare to exit */
csrr a1, mhartid
slli a1, a1, 2
la a0, pxCurrentTCB /* a0 = &pxCurrentTCB */
add a0, a0, a1 /* a0 = &pxCurrentTCB[coreID] */
lw a0, 0(a0) /* a0 = pxCurrentTCB[coreID] */
la a0, pxCurrentTCBs /* a0 = &pxCurrentTCBs */
add a0, a0, a1 /* a0 = &pxCurrentTCBs[coreID] */
lw a0, 0(a0) /* a0 = pxCurrentTCBs[coreID] */
lw sp, 0(a0) /* sp = previous sp */
#else
/* Recover the stack of next task */
lw a0, pxCurrentTCB
lw a0, pxCurrentTCBs
lw sp, 0(a0)
#endif /* ( configNUM_CORES > 1 ) */
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
/* esp_hw_stack_guard_set_bounds(pxCurrentTCB[0]->pxStack,
* pxCurrentTCB[0]->pxEndOfStack);
/* esp_hw_stack_guard_set_bounds(pxCurrentTCBs[0]->pxStack,
* pxCurrentTCBs[0]->pxEndOfStack);
*/
lw a1, PORT_OFFSET_PX_END_OF_STACK(a0)
lw a0, PORT_OFFSET_PX_STACK(a0)

15
components/freertos/FreeRTOS-Kernel/portable/xtensa/include/freertos/portmacro.h
View File

@@ -427,10 +427,13 @@ void vPortTCBPreDeleteHook( void *pxTCB );
* - Maps to forward declared functions
* ------------------------------------------------------------------------------------------------------------------ */
#if CONFIG_FREERTOS_USE_KERNEL_10_5_1
#define portGET_CORE_ID() xPortGetCoreID()
#define portYIELD_CORE( x ) vPortYieldOtherCore( x )
#endif
// ----------------------- System --------------------------
#if ( configNUMBER_OF_CORES > 1 )
#define portGET_CORE_ID() xPortGetCoreID()
#else /* configNUMBER_OF_CORES > 1 */
#define portGET_CORE_ID() ((BaseType_t) 0);
#endif /* configNUMBER_OF_CORES > 1 */
// --------------------- Interrupts ------------------------
@@ -523,6 +526,10 @@ extern void _frxt_setup_switch( void ); //Defined in portasm.S
*/
#define portYIELD_WITHIN_API() esp_crosscore_int_send_yield(xPortGetCoreID())
#if ( configNUMBER_OF_CORES > 1 )
#define portYIELD_CORE( xCoreID ) vPortYieldOtherCore( xCoreID )
#endif /* configNUMBER_OF_CORES > 1 */
// ------------------- Hook Functions ----------------------
#define portSUPPRESS_TICKS_AND_SLEEP(idleTime) vApplicationSleep(idleTime)

43
components/freertos/FreeRTOS-Kernel/portable/xtensa/portasm.S
View File

@@ -33,12 +33,7 @@
#define TOPOFSTACK_OFFS 0x00 /* StackType_t *pxTopOfStack */
#if CONFIG_FREERTOS_USE_KERNEL_10_5_1
#define pxCurrentTCB pxCurrentTCBs
.extern pxCurrentTCBs
#else
.extern pxCurrentTCB
#endif
#if XCHAL_CP_NUM > 0
/* Offsets used to get a task's coprocessor save area (CPSA) from its TCB */
@@ -154,11 +149,11 @@ _frxt_int_enter:
s32i a2, a3, 0 /* save nesting count */
bnei a2, 1, .Lnested /* !=0 before incr, so nested */
movi a2, pxCurrentTCB
movi a2, pxCurrentTCBs
addx4 a2, a4, a2
l32i a2, a2, 0 /* a2 = current TCB */
beqz a2, 1f
s32i a1, a2, TOPOFSTACK_OFFS /* pxCurrentTCB->pxTopOfStack = SP */
s32i a1, a2, TOPOFSTACK_OFFS /* pxCurrentTCBs->pxTopOfStack = SP */
movi a1, port_IntStack+configISR_STACK_SIZE /* a1 = top of intr stack for CPU 0 */
movi a2, configISR_STACK_SIZE /* add configISR_STACK_SIZE * cpu_num to arrive at top of stack for cpu_num */
mull a2, a4, a2
@@ -221,11 +216,11 @@ _frxt_int_exit:
rsync /* ensure CPENABLE was modified */
#endif
movi a2, pxCurrentTCB
movi a2, pxCurrentTCBs
addx4 a2, a4, a2
l32i a2, a2, 0 /* a2 = current TCB */
beqz a2, 1f /* no task ? go to dispatcher */
l32i a1, a2, TOPOFSTACK_OFFS /* SP = pxCurrentTCB->pxTopOfStack */
l32i a1, a2, TOPOFSTACK_OFFS /* SP = pxCurrentTCBs->pxTopOfStack */
movi a2, port_switch_flag /* address of switch flag */
addx4 a2, a4, a2 /* point to flag for this cpu */
@@ -433,7 +428,7 @@ _frxt_tick_timer_init:
* If restoring a task that was preempted, restores all state including the task's CPENABLE.
*
* Entry:
* pxCurrentTCB points to the TCB of the task to suspend,
* pxCurrentTCBs points to the TCB of the task to suspend,
* Because it is tail-called without a true function entrypoint, it needs no 'entry' instruction.
*
* Exit:
@@ -449,12 +444,12 @@ _frxt_dispatch:
#ifdef __XTENSA_CALL0_ABI__
call0 vTaskSwitchContext // Get next TCB to resume
movi a2, pxCurrentTCB
movi a2, pxCurrentTCBs
getcoreid a3
addx4 a2, a3, a2
#else
call4 vTaskSwitchContext // Get next TCB to resume
movi a2, pxCurrentTCB
movi a2, pxCurrentTCBs
getcoreid a3
addx4 a2, a3, a2
#endif
@@ -498,7 +493,7 @@ _frxt_dispatch:
#if XCHAL_CP_NUM > 0
/* Restore CPENABLE from task's co-processor save area. */
movi a2, pxCurrentTCB /* cp_state = */
movi a2, pxCurrentTCBs /* cp_state = */
getcoreid a3
addx4 a2, a3, a2
l32i a2, a2, 0
@@ -539,7 +534,7 @@ _frxt_dispatch:
* then tail-calls the dispatcher _frxt_dispatch() to perform the actual context switch
*
* At Entry:
* pxCurrentTCB points to the TCB of the task to suspend
* pxCurrentTCBs points to the TCB of the task to suspend
* Callable from C (obeys ABI conventions on entry).
*
* Does not return to caller.
@@ -591,13 +586,13 @@ vPortYield:
call0 _xt_coproc_savecs
#endif
movi a2, pxCurrentTCB
movi a2, pxCurrentTCBs
getcoreid a3
addx4 a2, a3, a2
l32i a2, a2, 0 /* a2 = pxCurrentTCB */
l32i a2, a2, 0 /* a2 = pxCurrentTCBs */
movi a3, 0
s32i a3, sp, XT_SOL_EXIT /* 0 to flag as solicited frame */
s32i sp, a2, TOPOFSTACK_OFFS /* pxCurrentTCB->pxTopOfStack = SP */
s32i sp, a2, TOPOFSTACK_OFFS /* pxCurrentTCBs->pxTopOfStack = SP */
#if XCHAL_CP_NUM > 0
/* Clear CPENABLE, also in task's co-processor state save area. */
@@ -623,8 +618,8 @@ vPortYield:
* _frxt_dispatch() to perform the actual context switch.
*
* At Entry:
* Interrupted task context has been saved in an interrupt stack frame at pxCurrentTCB->pxTopOfStack.
* pxCurrentTCB points to the TCB of the task to suspend,
* Interrupted task context has been saved in an interrupt stack frame at pxCurrentTCBs->pxTopOfStack.
* pxCurrentTCBs points to the TCB of the task to suspend,
* Callable from C (obeys ABI conventions on entry).
*
* At Exit:
@@ -642,7 +637,7 @@ vPortYieldFromInt:
#if XCHAL_CP_NUM > 0
/* Save CPENABLE in task's co-processor save area, and clear CPENABLE. */
movi a2, pxCurrentTCB /* cp_state = */
movi a2, pxCurrentTCBs /* cp_state = */
getcoreid a3
addx4 a2, a3, a2
l32i a2, a2, 0
@@ -696,9 +691,9 @@ _frxt_task_coproc_state:
l32i a15, a15, 0
bnez a15, 1f
movi a15, pxCurrentTCB
movi a15, pxCurrentTCBs
addx4 a15, a3, a15
l32i a15, a15, 0 /* && pxCurrentTCB != 0) { */
l32i a15, a15, 0 /* && pxCurrentTCBs != 0) { */
beqz a15, 2f
get_cpsa_from_tcb a15, a3 /* After this, pointer to CP save area is in a15, a3 is destroyed */
@@ -743,9 +738,9 @@ _frxt_coproc_exc_hook:
bnez a3, 1f /* We are in an interrupt. Return*/
/* CP operations are incompatible with unpinned tasks. Thus we pin the task
to the current running core. */
movi a3, pxCurrentTCB
movi a3, pxCurrentTCBs
addx4 a3, a2, a3
l32i a3, a3, 0 /* a3 = pxCurrentTCB[xCurCoreID] */
l32i a3, a3, 0 /* a3 = pxCurrentTCBs[xCurCoreID] */
movi a4, offset_xCoreID
l32i a4, a4, 0 /* a4 = offset_xCoreID */
add a3, a3, a4 /* a3 = &TCB.xCoreID */