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fix(esp_hw_support): clear reserved interrupts that are not applicable for each target

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Omar Chebib
2024-03-12 11:01:51 +08:00
parent 1439815d57
commit 16d957e7aa
14 changed files with 271 additions and 225 deletions
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8
components/soc/esp32c6/esp_cpu_intr.c
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@@ -12,9 +12,11 @@ void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_
/* On targets that uses CLIC as the interrupt controller, the first 16 lines (0..15) are reserved for software
* interrupts, all the other lines starting from 16 and above can be used by external peripheral.
*
* Only interrupt line 6 is reserved at the moment since it is used for disabling interrupts */
/* TODO: IDF-8655, we may need to reserve more interrupts once we have Wifi and BT */
* Reserve interrupt line 1 for the Wifi controller.
* Reserve interrupt line 6 since it is used for disabling interrupts in the interrupt allocator (INT_MUX_DISABLED_INTNO)
*/
const uint32_t rsvd_mask = BIT(1) | BIT(6);
intr_desc_ret->priority = 1;
intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;
intr_desc_ret->flags = (intr_num == 6) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
intr_desc_ret->flags = esp_riscv_intr_num_flags(intr_num, rsvd_mask);
}