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feat(p4): p4 rev3 real chip support

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armando
2025-08-20 14:30:35 +08:00
parent d4a821a03e
commit 179d00a6f8
259 changed files with 91 additions and 58 deletions
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2
components/heap/port/memory_layout_utils.c
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@@ -60,7 +60,7 @@ static void s_prepare_reserved_regions(soc_reserved_region_t *reserved, size_t c
/* Get the ROM layout to find which part of DRAM is reserved */
const ets_rom_layout_t *layout = ets_rom_layout_p;
reserved[0].start = (intptr_t)layout->dram0_rtos_reserved_start;
#if SOC_DIRAM_ROM_RESERVE_HIGH && CONFIG_ESP32P4_SELECTS_REV_LESS_V2
#if SOC_DIRAM_ROM_RESERVE_HIGH && CONFIG_ESP32P4_SELECTS_REV_LESS_V3
reserved[0].end = SOC_DIRAM_ROM_RESERVE_HIGH;
#else
reserved[0].end = SOC_DIRAM_DRAM_HIGH;