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fix(esp_hw_support): Fix the flash I/DROM region PMP protection
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@@ -82,7 +82,7 @@ static inline bool test_and_print_register_bits(const uint32_t status,
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/**
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* Function called when a cache error occurs. It prints details such as the
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* explanation of why the panic occured.
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* explanation of why the panic occurred.
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*/
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static inline void print_cache_err_details(const void *frame)
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{
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@@ -172,7 +172,7 @@ static inline void print_assist_debug_details(const void *frame)
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panic_print_str("\r\n");
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if (!esp_hw_stack_guard_is_fired()) {
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panic_print_str("ASSIST_DEBUG is not triggered BUT interrupt occured!\r\n\r\n");
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panic_print_str("ASSIST_DEBUG is not triggered BUT interrupt occurred!\r\n\r\n");
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}
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panic_print_str("Detected in task \"");
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@@ -193,7 +193,7 @@ static inline void print_assist_debug_details(const void *frame)
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/**
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* Function called when a memory protection error occurs (PMS). It prints details such as the
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* explanation of why the panic occured.
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* explanation of why the panic occurred.
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*/
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#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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@@ -305,7 +305,7 @@ void panic_soc_fill_info(void *f, panic_info_t *info)
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info->reason = "Unknown reason";
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info->addr = (void *) frame->mepc;
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/* The mcause has been set by the CPU when the panic occured.
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/* The mcause has been set by the CPU when the panic occurred.
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* All SoC-level panic will call this function, thus, this register
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* lets us know which error was triggered. */
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if (frame->mcause == ETS_CACHEERR_INUM) {
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