fix(esp_hw_support): Fix the flash I/DROM region PMP protection

This commit is contained in:
Laukik Hase
2024-03-29 15:08:23 +05:30
parent c722d8aab6
commit 17ffe58051
4 changed files with 34 additions and 91 deletions

View File

@@ -82,7 +82,7 @@ static inline bool test_and_print_register_bits(const uint32_t status,
/**
* Function called when a cache error occurs. It prints details such as the
* explanation of why the panic occured.
* explanation of why the panic occurred.
*/
static inline void print_cache_err_details(const void *frame)
{
@@ -172,7 +172,7 @@ static inline void print_assist_debug_details(const void *frame)
panic_print_str("\r\n");
if (!esp_hw_stack_guard_is_fired()) {
panic_print_str("ASSIST_DEBUG is not triggered BUT interrupt occured!\r\n\r\n");
panic_print_str("ASSIST_DEBUG is not triggered BUT interrupt occurred!\r\n\r\n");
}
panic_print_str("Detected in task \"");
@@ -193,7 +193,7 @@ static inline void print_assist_debug_details(const void *frame)
/**
* Function called when a memory protection error occurs (PMS). It prints details such as the
* explanation of why the panic occured.
* explanation of why the panic occurred.
*/
#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
@@ -305,7 +305,7 @@ void panic_soc_fill_info(void *f, panic_info_t *info)
info->reason = "Unknown reason";
info->addr = (void *) frame->mepc;
/* The mcause has been set by the CPU when the panic occured.
/* The mcause has been set by the CPU when the panic occurred.
* All SoC-level panic will call this function, thus, this register
* lets us know which error was triggered. */
if (frame->mcause == ETS_CACHEERR_INUM) {