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spi_master: add feature spi periph clk source selectable

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This commit is contained in:
wanlei
2023-01-18 10:56:25 +08:00
parent b20c156ae6
commit 184145817c
45 changed files with 542 additions and 138 deletions
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14
components/hal/esp32h4/include/hal/spi_ll.h
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@@ -36,8 +36,6 @@ extern "C" {
#define SPI_LL_ONE_LINE_USER_MASK (SPI_FWRITE_QUAD | SPI_FWRITE_DUAL)
/// Swap the bit order to its correct place to send
#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
/// This is the expected clock frequency
#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
@@ -92,6 +90,18 @@ typedef enum {
/*------------------------------------------------------------------------------
* Control
*----------------------------------------------------------------------------*/
/**
* Select SPI peripheral clock source (master).
*
* @param hw Beginning address of the peripheral registers.
* @param clk_source clock source to select, see valid sources in type `spi_clock_source_t`
*/
static inline void spi_ll_set_clk_source(spi_dev_t *hw, spi_clock_source_t clk_source)
{
//empty, keep this for compatibility
}
/**
* Initialize SPI peripheral (master).
*