alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-10 04:43:33 +00:00
Code Issues Packages Projects Releases Wiki Activity

spi_master: add feature spi periph clk source selectable

Browse Source
This commit is contained in:
wanlei
2023-01-18 10:56:25 +08:00
parent b20c156ae6
commit 184145817c
45 changed files with 542 additions and 138 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
components/hal/esp32s3/include/hal/spi_ll.h
View File

@@ -38,8 +38,6 @@ extern "C" {
/// Swap the bit order to its correct place to send
#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
/// This is the expected clock frequency
#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
@@ -94,6 +92,25 @@ typedef enum {
/*------------------------------------------------------------------------------
* Control
*----------------------------------------------------------------------------*/
/**
* Select SPI peripheral clock source (master).
*
* @param hw Beginning address of the peripheral registers.
* @param clk_source clock source to select, see valid sources in type `spi_clock_source_t`
*/
static inline void spi_ll_set_clk_source(spi_dev_t *hw, spi_clock_source_t clk_source){
switch (clk_source)
{
case SPI_CLK_SRC_XTAL:
hw->clk_gate.mst_clk_sel = 0;
break;
default:
hw->clk_gate.mst_clk_sel = 1;
break;
}
}
/**
* Initialize SPI peripheral (master).
*