spi_master: add feature spi periph clk source selectable

components/soc/esp32s2/include/soc/Kconfig.soc_caps.in

@@ -607,6 +607,10 @@ config SOC_SPI_SUPPORT_CONTINUOUS_TRANS
     bool
     default y
 
+config SOC_SPI_SUPPORT_CLK_APB
+    bool
+    default y
+
 config SOC_SPI_SUPPORT_SLAVE_HD_VER2
     bool
     default y

components/soc/esp32s2/include/soc/clk_tree_defs.h

@@ -260,7 +260,22 @@ typedef enum {
     I2C_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,
 } soc_periph_i2c_clk_src_t;
 
-//////////////////////////////////////////////////SDM///////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////SPI////////////////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of SPI
+ */
+#define SOC_SPI_CLKS {SOC_MOD_CLK_APB}
+
+/**
+ * @brief Type of SPI clock source.
+ */
+typedef enum {
+    SPI_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,      /*!< Select APB as SPI source clock */
+    SPI_CLK_SRC_APB = SOC_MOD_CLK_APB,          /*!< Select XTAL as SPI source clock */
+} soc_periph_spi_clk_src_t;
+
+//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////
 
 /**
  * @brief Array initializer for all supported clock sources of SDM

components/soc/esp32s2/include/soc/soc_caps.h

@@ -264,6 +264,7 @@
 #define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS     1
 #define SOC_SPI_SUPPORT_CD_SIG              1
 #define SOC_SPI_SUPPORT_CONTINUOUS_TRANS    1
+#define SOC_SPI_SUPPORT_CLK_APB             1
 /// The SPI Slave half duplex mode has been updated greatly in ESP32-S2
 #define SOC_SPI_SUPPORT_SLAVE_HD_VER2       1