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change(soc): add sleep retention module total number definition

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This commit is contained in:
Li Shuai
2024-09-19 11:54:00 +08:00
parent 8368564717
commit 1857bededb
15 changed files with 44 additions and 344 deletions
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4
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
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@@ -1935,6 +1935,10 @@ config SOC_SLEEP_TGWDT_STOP_WORKAROUND
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 32
config SOC_PSRAM_VDD_POWER_MPLL
bool
default y

82
components/soc/esp32p4/include/soc/retention_periph_defs.h
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@@ -7,7 +7,7 @@
#pragma once
#include <stdint.h>
#include "esp_bit_defs.h"
#include "soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -55,87 +55,9 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_GPSPI3 = 30,
SLEEP_RETENTION_MODULE_LEDC = 31,
SLEEP_RETENTION_MODULE_MAX = 31
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_NULL = BIT(SLEEP_RETENTION_MODULE_NULL),
/* clock module, which includes system and modem */
SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, UART, Timer Group, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_BM_TG0_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
SLEEP_RETENTION_MODULE_BM_TG1_WDT = BIT(SLEEP_RETENTION_MODULE_TG1_WDT),
SLEEP_RETENTION_MODULE_BM_TG0_TIMER = BIT(SLEEP_RETENTION_MODULE_TG0_TIMER),
SLEEP_RETENTION_MODULE_BM_TG1_TIMER = BIT(SLEEP_RETENTION_MODULE_TG1_TIMER),
/* AHB_DMA by channel */
SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH0 = BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH0),
SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH1 = BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH1),
SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH2 = BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH2),
/* AXI_DMA by channel */
SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH0 = BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH0),
SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH1 = BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH1),
SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH2 = BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH2),
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
SLEEP_RETENTION_MODULE_BM_UART2 = BIT(SLEEP_RETENTION_MODULE_UART2),
SLEEP_RETENTION_MODULE_BM_UART3 = BIT(SLEEP_RETENTION_MODULE_UART3),
SLEEP_RETENTION_MODULE_BM_UART4 = BIT(SLEEP_RETENTION_MODULE_UART4),
SLEEP_RETENTION_MODULE_BM_RMT0 = BIT(SLEEP_RETENTION_MODULE_RMT0),
SLEEP_RETENTION_MODULE_BM_I2S0 = BIT(SLEEP_RETENTION_MODULE_I2S0),
SLEEP_RETENTION_MODULE_BM_I2S1 = BIT(SLEEP_RETENTION_MODULE_I2S1),
SLEEP_RETENTION_MODULE_BM_I2S2 = BIT(SLEEP_RETENTION_MODULE_I2S2),
SLEEP_RETENTION_MODULE_BM_ETM0 = BIT(SLEEP_RETENTION_MODULE_ETM0),
SLEEP_RETENTION_MODULE_BM_I2C0 = BIT(SLEEP_RETENTION_MODULE_I2C0),
SLEEP_RETENTION_MODULE_BM_I2C1 = BIT(SLEEP_RETENTION_MODULE_I2C1),
SLEEP_RETENTION_MODULE_BM_TWAI0 = BIT(SLEEP_RETENTION_MODULE_TWAI0),
SLEEP_RETENTION_MODULE_BM_TWAI1 = BIT(SLEEP_RETENTION_MODULE_TWAI1),
SLEEP_RETENTION_MODULE_BM_TWAI2 = BIT(SLEEP_RETENTION_MODULE_TWAI2),
SLEEP_RETENTION_MODULE_BM_PARLIO0 = BIT(SLEEP_RETENTION_MODULE_PARLIO0),
SLEEP_RETENTION_MODULE_BM_GPSPI2 = BIT(SLEEP_RETENTION_MODULE_GPSPI2),
SLEEP_RETENTION_MODULE_BM_GPSPI3 = BIT(SLEEP_RETENTION_MODULE_GPSPI3),
SLEEP_RETENTION_MODULE_BM_LEDC = BIT(SLEEP_RETENTION_MODULE_LEDC),
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TG0_WDT \
| SLEEP_RETENTION_MODULE_BM_TG1_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_UART2 \
| SLEEP_RETENTION_MODULE_BM_UART3 \
| SLEEP_RETENTION_MODULE_BM_UART4 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
| SLEEP_RETENTION_MODULE_BM_I2S0 \
| SLEEP_RETENTION_MODULE_BM_I2S1 \
| SLEEP_RETENTION_MODULE_BM_I2S2 \
| SLEEP_RETENTION_MODULE_BM_ETM0 \
| SLEEP_RETENTION_MODULE_BM_I2C0 \
| SLEEP_RETENTION_MODULE_BM_I2C1 \
| SLEEP_RETENTION_MODULE_BM_TWAI0 \
| SLEEP_RETENTION_MODULE_BM_TWAI1 \
| SLEEP_RETENTION_MODULE_BM_TWAI2 \
| SLEEP_RETENTION_MODULE_BM_PARLIO0 \
| SLEEP_RETENTION_MODULE_BM_GPSPI2 \
| SLEEP_RETENTION_MODULE_BM_GPSPI3 \
| SLEEP_RETENTION_MODULE_BM_LEDC \
| SLEEP_RETENTION_MODULE_BM_NULL \
)
#ifdef __cplusplus
}
#endif

2
components/soc/esp32p4/include/soc/soc_caps.h
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@@ -726,6 +726,8 @@
#define SOC_SLEEP_SYSTIMER_STALL_WORKAROUND 1 //TODO IDF-11381: replace with all xtal field clk gate control
#define SOC_SLEEP_TGWDT_STOP_WORKAROUND 1 //TODO IDF-11381: replace with all xtal field clk gate control
#define SOC_PM_RETENTION_MODULE_NUM (32)
/*-------------------------- PSRAM CAPS ----------------------------*/
#define SOC_PSRAM_VDD_POWER_MPLL (1)