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docs: fix syntax errors in only:: blocks
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@@ -24,7 +24,7 @@ There are no such constraints and impacts for flash chips on other SPI buses tha
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For differences between IRAM, DRAM, and flash cache, please refer to the :ref:`application memory layout <memory-layout>` documentation.
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.. only: not CONFIG_FREERTOS_UNICORE
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.. only:: not CONFIG_FREERTOS_UNICORE
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To avoid reading flash cache accidentally, when one CPU initiates a flash write or erase operation, the other CPU is put into a blocked state, and all non-IRAM-safe interrupts are disabled on all CPUs until the flash operation completes.
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