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global: bring up esp32s2(not beta)

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morris
2019-12-26 15:25:24 +08:00
parent a85b207d68
commit 1c2cc5430e
128 changed files with 17102 additions and 9733 deletions
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31
components/esp32s2beta/cache_err_int.c
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@@ -27,6 +27,7 @@
#include "esp_err.h"
#include "esp_intr_alloc.h"
#include "esp_attr.h"
#include "soc/extmem_reg.h"
#include "soc/dport_reg.h"
#include "soc/periph_defs.h"
#include "sdkconfig.h"
@@ -52,17 +53,25 @@ void esp_cache_err_int_init(void)
// interrupt is connected to PRO CPU and invalid access happens on the APP
// CPU.
DPORT_SET_PERI_REG_MASK(DPORT_PRO_CACHE_IA_INT_EN_REG,
DPORT_MMU_ENTRY_FAULT_INT_ENA |
DPORT_DCACHE_REJECT_INT_ENA |
DPORT_DCACHE_WRITE_FLASH_INT_ENA |
DPORT_DC_PRELOAD_SIZE_FAULT_INT_ENA |
DPORT_DC_SYNC_SIZE_FAULT_INT_ENA |
DPORT_ICACHE_REJECT_INT_ENA |
DPORT_IC_PRELOAD_SIZE_FAULT_INT_ENA |
DPORT_IC_SYNC_SIZE_FAULT_INT_ENA |
DPORT_CACHE_DBG_INT_CLR |
DPORT_CACHE_DBG_EN);
DPORT_SET_PERI_REG_MASK(EXTMEM_CACHE_DBG_INT_CLR_REG,
EXTMEM_MMU_ENTRY_FAULT_INT_CLR |
EXTMEM_DCACHE_REJECT_INT_CLR |
EXTMEM_DCACHE_WRITE_FLASH_INT_CLR |
EXTMEM_DC_PRELOAD_SIZE_FAULT_INT_CLR |
EXTMEM_DC_SYNC_SIZE_FAULT_INT_CLR |
EXTMEM_ICACHE_REJECT_INT_CLR |
EXTMEM_IC_PRELOAD_SIZE_FAULT_INT_CLR |
EXTMEM_IC_SYNC_SIZE_FAULT_INT_CLR);
DPORT_SET_PERI_REG_MASK(EXTMEM_CACHE_DBG_INT_ENA_REG,
EXTMEM_MMU_ENTRY_FAULT_INT_ENA |
EXTMEM_DCACHE_REJECT_INT_ENA |
EXTMEM_DCACHE_WRITE_FLASH_INT_ENA |
EXTMEM_DC_PRELOAD_SIZE_FAULT_INT_ENA |
EXTMEM_DC_SYNC_SIZE_FAULT_INT_ENA |
EXTMEM_ICACHE_REJECT_INT_ENA |
EXTMEM_IC_PRELOAD_SIZE_FAULT_INT_ENA |
EXTMEM_IC_SYNC_SIZE_FAULT_INT_ENA |
EXTMEM_CACHE_DBG_EN);
ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
}