mirror of
https://github.com/espressif/esp-idf.git
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global: bring up esp32s2(not beta)
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@@ -1,4 +1,4 @@
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// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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@@ -16,10 +16,10 @@
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#include <stdlib.h>
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "soc/soc.h"
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#include "soc/soc_memory_layout.h"
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#include "esp_heap_caps.h"
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#include "sdkconfig.h"
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/* Memory layout for ESP32 SoC */
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@@ -51,11 +51,6 @@ const soc_memory_type_desc_t soc_memory_types[] = {
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//Type 4: SPI SRAM data
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//TODO, in fact, part of them support EDMA, to be supported.
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{ "SPIRAM", { MALLOC_CAP_SPIRAM|MALLOC_CAP_DEFAULT, 0, MALLOC_CAP_8BIT|MALLOC_CAP_32BIT}, false, false},
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//Type 5: SPI SRAM data from AHB DBUS3, slower than normal
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//TODO, add a bit to control the access of it
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#if CONFIG_USE_AHB_DBUS3_ACCESS_SPIRAM
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{ "SPIRAM(Slow)", { MALLOC_CAP_SPIRAM|MALLOC_CAP_DEFAULT, 0, MALLOC_CAP_8BIT|MALLOC_CAP_32BIT}, false, false},
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#endif
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};
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const size_t soc_memory_type_count = sizeof(soc_memory_types)/sizeof(soc_memory_type_desc_t);
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@@ -69,9 +64,6 @@ from low to high start address.
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const soc_memory_region_t soc_memory_regions[] = {
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#ifdef CONFIG_SPIRAM
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{ SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW, 4, 0}, //SPI SRAM, if available
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#if CONFIG_USE_AHB_DBUS3_ACCESS_SPIRAM
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{ SOC_SLOW_EXTRAM_DATA_LOW, SOC_SLOW_EXTRAM_DATA_HIGH - SOC_SLOW_EXTRAM_DATA_LOW, 5, 0}, //SPI SRAM, if available
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#endif
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#endif
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#if CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB
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#if CONFIG_ESP32S2_DATA_CACHE_0KB
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@@ -116,21 +108,18 @@ const soc_memory_region_t soc_memory_regions[] = {
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const size_t soc_memory_region_count = sizeof(soc_memory_regions)/sizeof(soc_memory_region_t);
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extern int _data_start_xtos;
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extern int _dram0_rtos_reserved_start;
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/* Reserved memory regions
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These are removed from the soc_memory_regions array when heaps are created.
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*/
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//ROM data region
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SOC_RESERVE_MEMORY_REGION(0x3fffc000, (intptr_t)&_data_start_xtos, rom_data_region);
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SOC_RESERVE_MEMORY_REGION((intptr_t)&_dram0_rtos_reserved_start, SOC_BYTE_ACCESSIBLE_HIGH, rom_data_region);
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// TODO: soc_memory_layout: handle trace memory regions - IDF-750
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#ifdef CONFIG_SPIRAM
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SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_data_region); //SPI RAM gets added later if needed, in spiram.c; reserve it for now
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#if CONFIG_USE_AHB_DBUS3_ACCESS_SPIRAM
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SOC_RESERVE_MEMORY_REGION( SOC_SLOW_EXTRAM_DATA_LOW, SOC_SLOW_EXTRAM_DATA_HIGH, extram_slow_data_region); //SPI RAM(Slow) gets added later if needed, in spiram.c; reserve it for now
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#endif
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#endif
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