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feat(hal/usb): Add USB UTMI PHY HAL
* Add a bare-bones HAL API for the USB UTMI PHY * Split USB-DWC LL per target
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@@ -53,7 +53,7 @@ FORCE_INLINE_ATTR void usb_utmi_ll_enable_bus_clock(bool clk_en)
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/**
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* @brief Reset the USB UTMI PHY and USB_DWC_HS controller
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*/
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FORCE_INLINE_ATTR void usb_utmi_ll_reset_register(void)
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FORCE_INLINE_ATTR void _usb_utmi_ll_reset_register(void)
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{
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// Reset the USB_UTMI and USB_DWC_HS
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LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20 = 1;
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@@ -63,7 +63,7 @@ FORCE_INLINE_ATTR void usb_utmi_ll_reset_register(void)
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}
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// P_AON_CLKRST.hp_usb_clkrst_ctrlx is shared register, so this function must be used in an atomic way
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#define usb_utmi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_utmi_ll_reset_register(__VA_ARGS__)
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#define usb_utmi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _usb_utmi_ll_reset_register(__VA_ARGS__)
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/**
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* @brief Enable precise detection of VBUS
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